| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| band_nrg_v5.s | 34 mov r5, r2, asr #16
36 cmp r5, #0
73 cmp r4, r5
98 mov r5, r4, lsl #1
100 ldrsh r10, [r2, r5]
101 add r5, r2, r5
103 ldrsh r11, [r5, #2]
120 add r5, r8, r9
124 smull r5, r3, r5, r
[all...] |
| /bionic/libc/arch-arm/generic/bionic/ |
| memcpy.S | 54 /* Making room for r5-r11 which will be spilled later */
95 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
98 stmea sp, {r5-r11}
109 ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */
111 stmcsia r0!, {r4, r5, r6, r7}
180 ldmcsia r1!, {r4, r5, r6, r7} /* 16 bytes */
182 stmcsia r0!, {r4, r5, r6, r7}
194 1: ldmfd sp!, {r5-r11}
212 /* Use post-incriment mode for stm to spill r5-r11 to reserved stack
215 stmea sp, {r5-r11
[all...] |
| /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/ |
| pvmp3_polyphase_filter_window_arm.s | 68 ldr r5,[r3]
72 smlal r2,r9,lr,r5
76 smlal r5,r11,r2,r5
77 smull r6,r5,r2,r6
78 sub r9,r9,r5
79 ldr r5,[r1,#8]
82 smlal r6,r9,r5,r7
83 smull r6,r2,r5,r8
84 ldr r5,[r1,#0xc
[all...] |
| pvmp3_polyphase_filter_window_gcc.s | 68 ldr r5,[r3]
72 smlal r2,r9,lr,r5
76 smlal r5,r11,r2,r5
77 smull r6,r5,r2,r6
78 sub r9,r9,r5
79 ldr r5,[r1,#8]
82 smlal r6,r9,r5,r7
83 smull r6,r2,r5,r8
84 ldr r5,[r1,#0xc
[all...] |
| pvmp3_polyphase_filter_window_wm.asm | 63 ldr r5,[r3]
67 smlal r2,r9,lr,r5
71 smlal r5,r11,r2,r5
72 smull r6,r5,r2,r6
73 sub r9,r9,r5
74 ldr r5,[r1,#8]
77 smlal r6,r9,r5,r7
78 smull r6,r2,r5,r8
79 ldr r5,[r1,#0xc
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 27 LDR r5,[r0],r1
30 STR r5,[r2],r3
36 LDR r5,[r0,#4]
41 ORR r4,r4,r5,LSL #24
45 LDR r5,[r0,#4]
51 ORR r4,r4,r5,LSL #24
58 LDR r5,[r0,#4]
63 ORR r4,r4,r5,LSL #16
68 LDR r5,[r0,#4]
73 ORR r4,r4,r5,LSL #1
[all...] |
| omxVCM4P10_TransformDequantChromaDCFromPair_s.S | 24 ldrnesb r5, [r9, #1]
28 orrne r4, r4, r5, lsl #8
35 ldr r5, .LarmVCM4P10_QPDivTable
36 P0: add r5, pc
41 ldrsb r9, [r5, r2]
43 sadd16 r5, r3, r4
46 vmov d0, r5, r6
|
| omxVCM4P10_PredictIntra_4x4_s.S | 29 LDRD r4,r5,[sp,#0x50]
40 ADD r11,r3,r5
41 ADD r12,r5,r5
49 ADD r11,r3,r5
50 ADD r12,r5,r5
74 ADD r11,r3,r5
75 ADD r12,r5,r5
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_DOUBLE_TO_INT.S | 16 stmfd sp!, {r4, r5, lr} @ save regs
23 mov r5, r1 @ and r1
30 mov r1, r5
40 mov r1, r5
42 mov r3, r5
48 mov r1, r5
53 ldmfd sp!, {r4, r5, pc}
|
| OP_DOUBLE_TO_LONG.S | 14 stmfd sp!, {r4, r5, lr} @ save regs
20 mov r5, r1 @ and r1
28 mov r1, r5
39 mov r1, r5
41 mov r3, r5
48 mov r1, r5
53 ldmfd sp!, {r4, r5, pc}
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_DOUBLE_TO_INT.S | 16 stmfd sp!, {r4, r5, lr} @ save regs
23 mov r5, r1 @ and r1
30 mov r1, r5
40 mov r1, r5
42 mov r3, r5
48 mov r1, r5
53 ldmfd sp!, {r4, r5, pc}
|
| OP_DOUBLE_TO_LONG.S | 14 stmfd sp!, {r4, r5, lr} @ save regs
20 mov r5, r1 @ and r1
28 mov r1, r5
39 mov r1, r5
41 mov r3, r5
48 mov r1, r5
53 ldmfd sp!, {r4, r5, pc}
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Norm_Corr_opt.s | 31 @ r5 --- t_max
59 ADD r5, r0, r11, LSL #1 @get the &exc[k]
63 MOV r0, r5
72 MOV r5, #64
89 SUBS r5, r5, #8
104 MOV r5, #0 @L_tmp = 0
116 SMLABB r5, r10, r11, r5 @L_tmp += xn[i] * excf[i]
117 SMLATT r5, r10, r11, r5 @L_tmp += xn[i+1] * excf[i+1
[all...] |
| /frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/ |
| idct.cpp | 131 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; /* butterfly nodes */ local
154 r5 = blk[B_SIZE * 7 + i];
158 if (!(r1 | r2 | r3 | r4 | r5 | r6 | r7))
182 r8 = W7 * (r4 + r5);
186 r5 = (r8 - (W1 + W7) * r5);
201 r6 = r5 + r7;
202 r5 -= r7;
209 r2 = (181 * (r4 + r5) + 128) >> 8; /* rounding */
210 r4 = (181 * (r4 - r5) + 128) >> 8
353 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; \/* butterfly nodes *\/ local
[all...] |
| /external/libffi/src/powerpc/ |
| aix_closure.S | 32 .set r5,5
122 stw r5, 208(r1)
152 addi r5,r1,200
167 addi r5,r1,160 /* get pointer to results area */
195 lfd f1,0(r5)
200 lfs f1,0(r5)
205 lwz r3,0(r5)
206 lwz r4,4(r5)
211 lwz r3,0(r5)
216 addi r5,r5,
[all...] |
| /external/aac/libFDK/src/arm/ |
| dct_arm.cpp | 106 r5 accu2
118 LDR r5, [r2, #0] // accu2 = pDat_0[0] local
121 SMULWT r9, r5, r8 // accuX = accu2*val_tw.l local
122 SMULWB r5, r5, r8 // accu2 = accu2*val_tw.h local
124 SMLAWT r5, r4, r8, r5 // accu2 = accu2*val_tw.h + accu1*val_tw.l local
137 STR r5, [r2], #4 // *pDat_0++ = accu2 local
144 LDR r5, [r2, #0] // accu2 = pDat_0[0] local
147 SMULWT r9, r5, r8 // accuX = accu2*val_tw. local
148 SMULWB r5, r5, r8 \/\/ accu2 = accu2*val_tw.h local
150 SMLAWT r5, r4, r8, r5 \/\/ accu2 = accu2*val_tw.h + accu1*val_tw.l local
163 STR r5, [r2], #4 \/\/ *pDat_0++ = accu2 local
295 LDR r5, [r2] \/\/ accu2 = pDat_0[0] local
297 RSB r5, r5, #0 \/\/ accu2 = -accu2 local
298 SMULWT r9, r5, r8 \/\/ accuX = (-accu2)*val_tw.l local
304 SMLAWB r5, r5, r8, r4 \/\/ accu2 = (-accu2)*val_tw.t+accu1*val_tw.l local
306 STR r5, [r2], #4 \/\/ *pDat_0++ = accu2 local
309 SMULWB r5, r7, r8 \/\/ accu2 = (-accu4)*val_tw.h local
311 RSB r5, r5, #0 \/\/ accu2 = -(-accu4)*val_tw.h local
318 LDR r5, [r2] \/\/ accu2 = pDat_0[0] local
320 RSB r5, r5, #0 \/\/ accu2 = -accu2 local
321 SMULWT r9, r5, r8 \/\/ accuX = (-accu2)*val_tw.l local
327 SMLAWB r5, r5, r8, r4 \/\/ accu2 = (-accu2)*val_tw.t+accu1*val_tw.l local
329 STR r5, [r2], #4 \/\/ *pDat_0++ = accu2 local
332 SMULWB r5, r7, r8 \/\/ accu2 = (-accu4)*val_tw.h local
334 RSB r5, r5, #0 \/\/ accu2 = -(-accu4)*val_tw.h local
[all...] |
| /system/core/libpixelflinger/ |
| rotate90CW_4x4_16v6.S | 36 stmfd sp!, {r4,r5, r6,r7, r8,r9, r10,r11, lr}
41 ldrd r4, r5, [r1], r14
54 pkhbt r11, r5, r3, lsl #16
59 pkhtb r11, r3, r5, asr #16
62 ldmfd sp!, {r4,r5, r6,r7, r8,r9, r10,r11, pc}
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| ppc.pl | 228 #.set r5,5 # 3rd argument/volatile register
275 # Freely use registers r5,r6,r7,r8,r9,r10,r11 as follows:
277 # r5,r6 are the two BN_ULONGs being multiplied.
287 $LD r5,`0*$BNSZ`(r4)
288 $UMULL r9,r5,r5
289 $UMULH r10,r5,r5 #in first iteration. No need
297 $UMULL r7,r5,r6
298 $UMULH r8,r5,r
[all...] |
| /external/openssl/crypto/bn/asm/ |
| ppc.pl | 228 #.set r5,5 # 3rd argument/volatile register
275 # Freely use registers r5,r6,r7,r8,r9,r10,r11 as follows:
277 # r5,r6 are the two BN_ULONGs being multiplied.
287 $LD r5,`0*$BNSZ`(r4)
288 $UMULL r9,r5,r5
289 $UMULH r10,r5,r5 #in first iteration. No need
297 $UMULL r7,r5,r6
298 $UMULH r8,r5,r
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| intra4x4_predict_v6.asm | 55 ldrb r5, [r1], r2 ; Left[1]
61 add r4, r4, r5
85 ldrb r5, [r1], r2 ; Left[1]
98 add r5, r5, r5, lsl #16 ; l[1|1]
107 sadd16 r4, r5, r10 ; l[1|1] + a[2|0] - [tl|tl]
108 sadd16 r5, r5, r11 ; l[1|1] + a[3|1] - [tl|tl]
114 usat16 r5, #8, r
[all...] |
| /external/libvpx/libvpx/vp8/common/ppc/ |
| sad_altivec.asm | 56 lvsl v3, 0, r5 ;# only needs to be done once per block
60 lvx v1, 0, r5
61 lvx v2, r10, r5
63 add r5, r5, r6
76 lvx v1, 0, r5
77 lvx v2, r10, r5
88 add r5, r5, r6
93 lvx v1, 0, r5
[all...] |
| /external/tremolo/Tremolo/ |
| mdctLARM.s | 61 LDMDB r2!,{r5,r6,r7,r12}
63 MOV r5, r5, ASR #9 @ r5 = (*--r)>>9
83 MOV r14,r5, ASR #15
85 EORNE r5, r4, r14,ASR #31
86 STRH r5, [r0], r3
95 LDR r5,[r2,#-4]!
98 MOV r5, r5, ASR #9 @ r5 = (*--r)>>
[all...] |
| /external/libvpx/libvpx/vpx_scale/arm/neon/ |
| vp8_vpxyv12_extendframeborders_neon.asm | 37 sub r5, r1, #32 ; dest_ptr1 = src_ptr1 - Border
62 vst1.8 {q0, q1}, [r5], lr
64 vst1.8 {q4, q5}, [r5], lr
66 vst1.8 {q8, q9}, [r5], lr
68 vst1.8 {q12, q13}, [r5], lr
83 sub r5, r1, lr, asl #5 ; dest_ptr1 = src_ptr1 - (Border * plane_stride)
101 vst1.8 {q0, q1}, [r5]!
103 vst1.8 {q2, q3}, [r5]!
105 vst1.8 {q4, q5}, [r5]!
107 vst1.8 {q6, q7}, [r5]!
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | 48 adc r4, r5, r6
50 adc r4, r5, r6, lsl #1
51 adc r4, r5, r6, lsl #31
52 adc r4, r5, r6, lsr #1
53 adc r4, r5, r6, lsr #31
54 adc r4, r5, r6, lsr #32
55 adc r4, r5, r6, asr #1
56 adc r4, r5, r6, asr #31
57 adc r4, r5, r6, asr #32
58 adc r4, r5, r6, ror #
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| memcpy.a15.S | 62 optimized push {r0, r4, r5, r6, r7, lr}.
68 .save {r4, r5}
69 strd r4, r5, [sp, #-8]!
127 ldrd r4, r5, [r1, \offset]
128 strd r4, r5, [r0, \offset]
145 ldrd r4, r5, [r1], #8
146 strd r4, r5, [r0], #8
186 ldrbcs r5, [r1]
188 strbcs r5, [r0]
191 /* Restore registers: optimized pop {r0, r4, r5, r6, r7, pc} *
[all...] |
