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  /external/llvm/test/MC/Mips/
mips-register-names.s 4 # Second byte of addiu with $zero at rt contains the number of the source
39 addiu $zero, $zero, 0 label
40 addiu $at, $zero, 0 label
41 addiu $v0, $zero, 0 label
42 addiu $v1, $zero, 0 label
43 addiu $a0, $zero, 0 label
44 addiu $a1, $zero, 0 label
45 addiu $a2, $zero, 0 label
46 addiu $a3, $zero, 0 label
47 addiu $t0, $zero, label
48 addiu $t1, $zero, 0 label
49 addiu $t2, $zero, 0 label
50 addiu $t3, $zero, 0 label
51 addiu $t4, $zero, 0 label
52 addiu $t5, $zero, 0 label
53 addiu $t6, $zero, 0 label
54 addiu $t7, $zero, 0 label
55 addiu $s0, $zero, 0 label
56 addiu $s1, $zero, 0 label
57 addiu $s2, $zero, 0 label
58 addiu $s3, $zero, 0 label
59 addiu $s4, $zero, 0 label
60 addiu $s5, $zero, 0 label
61 addiu $s6, $zero, 0 label
62 addiu $s7, $zero, 0 label
63 addiu $t8, $zero, 0 label
64 addiu $t9, $zero, 0 label
65 addiu $k0, $zero, 0 label
66 addiu $k1, $zero, 0 label
67 addiu $gp, $zero, 0 label
68 addiu $sp, $zero, 0 label
69 addiu $fp, $zero, 0 label
70 addiu $sp, $zero, 0 label
71 addiu $ra, $zero, 0 label
    [all...]
mips-relocations.s 6 # CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24]
14 # CHECK: addiu $2, $2, %dtprel_hi(_gp_disp) # encoding: [A,A,0x42,0x24]
26 # CHECK: addiu $2, $2, %tprel_lo(_gp_disp) # encoding: [A,A,0x42,0x24]
30 addiu $2, $2, %lo(_gp_disp)
34 addiu $2, $2, %dtprel_hi(_gp_disp)
40 addiu $2, $2, %tprel_lo(_gp_disp)
  /external/llvm/test/CodeGen/Mips/
o32_cc.ll 51 ; CHECK: addiu $4, $zero, 12
52 ; CHECK: addiu $5, $zero, 13
53 ; CHECK: addiu $6, $zero, 14
54 ; CHECK: addiu $7, $zero, 15
67 ; CHECK: addiu $6, $zero, 23
78 ; CHECK: addiu $6, $zero, 33
79 ; CHECK: addiu $7, $zero, 24
90 ; CHECK: addiu $5, $zero, 43
91 ; CHECK: addiu $6, $zero, 34
103 ; CHECK: addiu $4, $zero, 2
    [all...]
addi.ll 23 ; 16: addiu ${{[0-9]+}}, 5 # 16 bit inst
24 ; 16: addiu ${{[0-9]+}}, -5 # 16 bit inst
25 ; 16: addiu ${{[0-9]+}}, 10000
26 ; 16: addiu ${{[0-9]+}}, -10000
stacksize.ll 6 ; CHECK-NOT: addiu $sp, $sp
eh-dwarf-cfa.ll 14 ; CHECK: addiu $sp, $sp, -32
15 ; CHECK: addiu $2, $sp, 32
27 ; CHECK: addiu $[[R0]], $[[R0]], -8
33 ; CHECK: addiu $2, $[[R1]], 8
47 ; CHECK: addiu $sp, $sp, -40
50 ; CHECK: addiu $[[R0:[a-z0-9]+]], $fp, 40
imm.ll 22 ; CHECK: addiu ${{[0-9]+}}, $zero, 4660
29 ; CHECK: addiu ${{[0-9]+}}, $zero, -32204
tls.ll 19 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t1)
25 ; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1)
42 ; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t2)
48 ; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
53 ; STATIC: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp)
66 ; PIC: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i)
selectcc.ll 12 ; SOURCE-SCHED: addiu
19 ; SOURCE-SCHED: addiu
20 ; SOURCE-SCHED: addiu
tls16.ll 9 ; PIC16: addiu ${{[0-9]+}}, %tlsgd(a)
tls16_2.ll 11 ; PIC16: addiu ${{[0-9]+}}, %tlsldm(f.i)
o32_cc_vararg.ll 31 ; CHECK: addiu $sp, $sp, -16
57 ; CHECK: addiu $sp, $sp, -16
61 ; CHECK: addiu $[[R0:[0-9]+]], $sp, 20
62 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7
63 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8
85 ; CHECK: addiu $sp, $sp, -16
108 ; CHECK: addiu $sp, $sp, -24
111 ; CHECK: addiu ${{[0-9]+}}, $sp, 32
136 ; CHECK: addiu $sp, $sp, -24
162 ; CHECK: addiu $sp, $sp, -2
    [all...]
align16.ll 29 ; 16: addiu $sp, -56 # 16 bit inst
30 ; 16: addiu $sp, 56 # 16 bit inst
blockaddr.ll 16 ; PIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp[[T0]])
18 ; PIC-O32: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp[[T1]])
20 ; STATIC-O32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]])
22 ; STATIC-O32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]])
24 ; PIC-N32: addiu ${{[0-9]+}}, $[[R0]], %got_ofst($tmp[[T0]])
26 ; PIC-N32: addiu ${{[0-9]+}}, $[[R1]], %got_ofst($tmp[[T1]])
28 ; STATIC-N32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]])
30 ; STATIC-N32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]])
remat-immed-load.ll 6 ; 32: addiu $4, $zero, 1
7 ; 32: addiu $4, $zero, 1
tnaked.ll 14 ; CHECK-NOT: addiu $sp, $sp, -8
26 ; CHECK: addiu $sp, $sp, -8
eh-return32.ll 13 ; CHECK: addiu $sp, $sp, -[[spoffset:[0-9]+]]
41 ; CHECK: addiu $sp, $sp, [[spoffset]]
54 ; CHECK: addiu $sp, $sp, -[[spoffset:[0-9]+]]
80 ; CHECK: addiu $sp, $sp, [[spoffset]]
  /external/pixman/pixman/
pixman-mips-dspr2-asm.S 47 addiu a0, a0, 2
48 addiu a1, a1, -2
55 addiu t1, t1, -1
57 addiu a1, a1, -32
68 addiu a0, a0, 32
78 addiu a0, a0, 32
81 addiu a1, a1, -2
84 addiu a0, a0, 2
104 addiu t1, t1, -1
106 addiu a1, a1, -3
    [all...]
  /external/kernel-headers/original/asm-mips/
string.h 31 "addiu\t%1,1\n\t"
34 "addiu\t%0,1\n\t"
59 "addiu\t%0,1\n\t"
61 "addiu\t%1,1\n"
82 "addiu\t%0,1\n\t"
84 "addiu\t%1,1\n\t"
116 "addiu\t%0,1\n\t"
118 "addiu\t%1,1\n"
  /external/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.cpp 32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL));
56 // A single ADDiu will do if RemSize <= 16.
58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
71 // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
79 // Replace a ADDiu & SLL pair with a LUi.
81 // ADDiu 0x0111
86 // Check if the first two instructions are ADDiu and SLL and the shift amount
88 if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) ||
92 // Sign-extend and shift operand of ADDiu and see if it still fits in 16-bit.
130 ADDiu = Mips::ADDiu
    [all...]
MipsAnalyzeImmediate.h 26 /// instruction in the sequence must be an ADDiu if LastInstrIsADDiu is
35 /// GetInstSeqLsADDiu - Get instrucion sequences which end with an ADDiu to
50 /// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
58 unsigned ADDiu, ORi, SLL, LUi;
  /ndk/tests/device/issue42891-boost-1_52/jni/boost/boost/smart_ptr/detail/
sp_counted_base_gcc_mips.hpp 43 "addiu %0, 1\n\t"
64 "addiu %0, %1, -1\n\t"
68 "addiu %0, %1, -1":
91 "addiu %1, %0, 1\n\t"
95 "addiu %0, %0, 1\n\t"
  /dalvik/vm/arch/mips/
CallO32.S 156 addiu $t0,4
157 addiu $a3,-1
164 addiu $t1,16 /* include space for a0/a1/a2/a3 */
166 addiu $t1,$sp,8
179 addiu $t0,4
180 addiu $a3,-1
182 addiu $t1,4
190 addiu $t0,4
191 addiu $a3,-1
194 addiu $t1,
    [all...]
  /art/runtime/arch/mips/
jni_entrypoints_mips.S 28 addiu $sp, $sp, -32 # leave room for $a0, $a1, $a2, $a3, and $ra
48 addiu $sp, $sp, 32 # restore the stack
65 addiu $sp, $sp, -32
87 addiu $sp, $sp, 32
  /bionic/libc/arch-mips/string/
memcpy.S 178 addiu a0,a0,64 # adding 64 to dest
181 addiu a1,a1,64 # adding 64 to src
201 addiu a1,a1,32
211 addiu a0,a0,32
222 addiu a1,a1,4
223 addiu a0,a0,4
233 addiu a1,a1,1
234 addiu a0,a0,1
343 addiu a0,a0,64 # adding 64 to dest
346 addiu a1,a1,64 # adding 64 to sr
    [all...]

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