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  /external/llvm/test/MC/Mips/
mips64-register-names.s 39 daddiu $zero, $zero, 0 label
40 daddiu $at, $zero, 0 label
41 daddiu $v0, $zero, 0 label
42 daddiu $v1, $zero, 0 label
43 daddiu $a0, $zero, 0 label
44 daddiu $a1, $zero, 0 label
45 daddiu $a2, $zero, 0 label
46 daddiu $a3, $zero, 0 label
47 daddiu $a4, $zero, 0 label
48 daddiu $a5, $zero, label
49 daddiu $a6, $zero, 0 label
50 daddiu $a7, $zero, 0 label
51 daddiu $t4, $zero, 0 label
52 daddiu $t5, $zero, 0 label
53 daddiu $t6, $zero, 0 label
54 daddiu $t7, $zero, 0 label
55 daddiu $s0, $zero, 0 label
56 daddiu $s1, $zero, 0 label
57 daddiu $s2, $zero, 0 label
58 daddiu $s3, $zero, 0 label
59 daddiu $s4, $zero, 0 label
60 daddiu $s5, $zero, 0 label
61 daddiu $s6, $zero, 0 label
62 daddiu $s7, $zero, 0 label
63 daddiu $t8, $zero, 0 label
64 daddiu $t9, $zero, 0 label
65 daddiu $kt0, $zero, 0 label
66 daddiu $kt1, $zero, 0 label
67 daddiu $gp, $zero, 0 label
68 daddiu $sp, $zero, 0 label
69 daddiu $s8, $zero, 0 label
70 daddiu $ra, $zero, 0 label
    [all...]
mips64-alu-instructions.s 70 # CHECK: daddiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x64]
73 # CHECK: daddiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x64]
74 # CHECK: daddiu $9, $9, -15001 # encoding: [0x67,0xc5,0x29,0x65]
94 daddiu $9,$6,-15001
95 daddiu $9,-15001
  /external/llvm/test/CodeGen/Mips/
mips64imm.ll 15 ; CHECK: daddiu ${{[0-9]+}}, $[[R0]], 22136
29 ; CHECK: daddiu ${{[0-9]+}}, $zero, -32204
37 ; CHECK: daddiu $[[R1:[0-9]+]], $[[R0]], -30001
39 ; CHECK: daddiu $[[R3:[0-9]+]], $[[R2]], 18441
41 ; CHECK: daddiu ${{[0-9]+}}, $[[R4]], 13398
49 ; CHECK: daddiu ${{[0-9]+}}, $[[R0]], 17185
mips64lea.ll 5 ; CHECK: daddiu ${{[0-9]+}}, $sp
longbranch.ll 12 ; N64: daddiu $1, $1, 0
14 ; N64: daddiu $1, $1, 0
17 ; N64: daddiu $1, $1, {{[0-9]+}}
largeimmprinting.ll 17 ; 64: daddiu $[[R0:[0-9]+]], $zero, 1
19 ; 64: daddiu $[[R0]], $[[R0]], -1
21 ; 64: daddiu $[[R0]], $[[R0]], -48
remat-immed-load.ll 18 ; 64: daddiu $4, $zero, 1
19 ; 64: daddiu $4, $zero, 1
eh-return64.ll 13 ; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
41 ; CHECK: daddiu $sp, $sp, [[spoffset]]
56 ; CHECK: daddiu $sp, $sp, -[[spoffset:[0-9]+]]
83 ; CHECK: daddiu $sp, $sp, [[spoffset]]
eh-dwarf-cfa.ll 61 ; CHECK-MIPS64: daddiu $sp, $sp, -32
62 ; CHECK-MIPS64: daddiu $2, $sp, 32
blockaddr.ll 32 ; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst($tmp[[T0]])
34 ; PIC-N64: daddiu ${{[0-9]+}}, $[[R1]], %got_ofst($tmp[[T1]])
36 ; STATIC-N64: daddiu ${{[0-9]+}}, $[[R2]], %got_ofst($tmp[[T2]])
38 ; STATIC-N64: daddiu ${{[0-9]+}}, $[[R3]], %got_ofst($tmp[[T3]])
fabs.ll 37 ; 64: daddiu $[[T0:[0-9]+]], $zero, 1
39 ; 64: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
fcopysign-f32-f64.ll 34 ; 64-DAG: daddiu $[[T0:[0-9]+]], $zero, 1
36 ; 64-DAG: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1
fcopysign.ll 21 ; 64: daddiu $[[T0:[0-9]+]], $zero, 1
24 ; 64: daddiu $[[MSK0:[0-9]+]], $[[MSK1]], -1
mips64load-store-left-right.ll 39 ; EL: daddiu $[[R2:[0-9]+]], $zero, 1
41 ; EL: daddiu $[[R4:[0-9]+]], $[[R3]], -1
mips64instrs.ll 40 ; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, 20
47 ; CHECK: daddiu ${{[0-9]+}}, ${{[0-9]+}}, -20
  /external/llvm/lib/Target/Mips/
Mips64InstrInfo.td 75 def DADDiu : ArithLogicI<"daddiu", simm16_64, GPR64Opnd, IIArith,
224 def LEA_ADDiu64 : EffectiveAddress<"daddiu", GPR64Opnd, mem_ea_64>, LW_FM<0x19>;
275 def : MipsPat<(MipsLo tglobaladdr:$in), (DADDiu ZERO_64, tglobaladdr:$in)>;
276 def : MipsPat<(MipsLo tblockaddress:$in), (DADDiu ZERO_64, tblockaddress:$in)>;
277 def : MipsPat<(MipsLo tjumptable:$in), (DADDiu ZERO_64, tjumptable:$in)>;
278 def : MipsPat<(MipsLo tconstpool:$in), (DADDiu ZERO_64, tconstpool:$in)>;
280 (DADDiu ZERO_64, tglobaltlsaddr:$in)>;
281 def : MipsPat<(MipsLo texternalsym:$in), (DADDiu ZERO_64, texternalsym:$in)>;
284 (DADDiu GPR64:$hi, tglobaladdr:$lo)>
    [all...]
MipsLongBranch.cpp 312 // daddiu $sp, $sp, -16
315 // daddiu $at, $at, %higher($tgt - $baltgt)
317 // daddiu $at, $at, %hi($tgt - $baltgt)
321 // daddiu $at, $at, %lo($tgt - $baltgt)
325 // daddiu $sp, $sp, 16
335 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
341 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
345 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
355 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::AT_64)
364 .append(BuildMI(*MF, DL, TII->get(Mips::DADDiu), Mips::SP_64
    [all...]
  /external/kernel-headers/original/asm-mips/
asm.h 274 #define INT_ADDIU daddiu
316 #define LONG_ADDIU daddiu
366 #define PTR_ADDIU daddiu
  /external/llvm/test/MC/Disassembler/Mips/
mips64.txt 2 # CHECK: daddiu $11, $26, 31949
mips64_le.txt 2 # CHECK: daddiu $11, $26, 31949
  /bionic/libc/kernel/arch-mips/asm/
asm.h 130 #define INT_ADDIU daddiu
175 #define LONG_ADDIU daddiu
227 #define PTR_ADDIU daddiu
  /development/ndk/platforms/android-9/arch-mips/include/asm/
asm.h 130 #define INT_ADDIU daddiu
175 #define LONG_ADDIU daddiu
227 #define PTR_ADDIU daddiu
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/
asm.h 130 #define INT_ADDIU daddiu
175 #define LONG_ADDIU daddiu
227 #define PTR_ADDIU daddiu
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/
asm.h 130 #define INT_ADDIU daddiu
175 #define LONG_ADDIU daddiu
227 #define PTR_ADDIU daddiu
  /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/
asm.h 130 #define INT_ADDIU daddiu
175 #define LONG_ADDIU daddiu
227 #define PTR_ADDIU daddiu

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