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  /external/llvm/test/CodeGen/Mips/
divrem.ll 32 ; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
43 ; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
62 ; TRAP: divu $zero,
divu.ll 12 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
divu_remu.ll 16 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
remu.ll 13 ; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
  /external/chromium_org/v8/test/cctest/
test-disasm-mips.cc 134 COMPARE(divu(a0, a1),
135 "0085001b divu a0, a1");
136 COMPARE(divu(t2, t3),
137 "014b001b divu t2, t3");
138 COMPARE(divu(v0, v1),
139 "0043001b divu v0, v1");
  /external/v8/test/cctest/
test-disasm-mips.cc 144 COMPARE(divu(a0, a1),
145 "0085001b divu a0, a1");
146 COMPARE(divu(t2, t3),
147 "014b001b divu t2, t3");
148 COMPARE(divu(v0, v1),
149 "0043001b divu v0, v1");
  /external/kernel-headers/original/asm-mips/
div64.h 73 __asm__("divu $0, %z2, %z3" \
  /bionic/libc/kernel/arch-mips/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /development/ndk/platforms/android-9/arch-mips/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/
div64.h 26 #define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; })
  /packages/apps/Gallery2/src/com/android/gallery3d/glrenderer/
NinePatchTexture.java 222 float divU[] = new float[4];
225 int nx = stretch(divX, divU, chunk.mDivX, tex.getWidth(), width);
228 prepareVertexData(divX, divY, divU, divV, nx, ny, chunk.mColor);
  /external/chromium_org/v8/src/mips/
constants-mips.cc 258 case DIVU:
disasm-mips.cc 691 case DIVU:
692 Format(instr, "divu 'rs, 'rt");
  /external/v8/src/mips/
constants-mips.cc 254 case DIVU:
disasm-mips.cc 681 case DIVU:
682 Format(instr, "divu 'rs, 'rt");
  /art/runtime/
disassembler_mips.cc 76 { kRTypeMask, 27, "divu", "ST", },
  /external/valgrind/main/none/tests/mips32/
MIPS32int.c 244 printf("DIVU\n");
245 TESTINST3a("divu $t0, $t1", 0x6, 0x2, t0, t1);
246 TESTINST3a("divu $t0, $t1", 0x7fffffff, 0x7fffffff, t0, t1);
247 TESTINST3a("divu $t0, $t1", 0xffffffff, 0x1, t0, t1);
248 TESTINST3a("divu $t0, $t1", 0x1, 0xffffffff, t0, t1);
249 TESTINST3a("divu $t0, $t1", 0x2, 0x6, t0, t1);
250 TESTINST3a("divu $t0, $t1", 0x0, 0x2, t0, t1);
    [all...]
MIPS32int.stdout.exp 104 DIVU
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
110 divu $t0, $t1 :: rs 0x00000000 rt 0x00000002 HI 0x00000000 LO 0x00000000
    [all...]
MIPS32int.stdout.exp-BE 104 DIVU
105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003
106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001
107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff
108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000
109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000
110 divu $t0, $t1 :: rs 0x00000000 rt 0x00000002 HI 0x00000000 LO 0x00000000
    [all...]
  /art/compiler/utils/mips/
assembler_mips.h 233 void Divu(Register rs, Register rt);
  /external/llvm/test/MC/Disassembler/XCore/
xcore.txt 373 # CHECK: divu r9, r1, r3

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