| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/gas64/ |
| gas-muldiv.asm | 21 divw %cx label
25 divw %cx, %ax label
|
| /external/llvm/test/CodeGen/X86/ |
| atom-bypass-slow-division-64.ll | 13 ; CHECK: divw
27 ; CHECK: divw
40 ; CHECK: divw
44 ; CHECK-NOT: divw
|
| fast-isel-divrem.ll | 72 ; CHECK: divw
82 ; CHECK: divw
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding.s | 290 # CHECK: divw 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd6]
291 divw 2, 3, 4
292 # CHECK: divw. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd7]
293 divw. 2, 3, 4
|
| /external/valgrind/main/none/tests/ppc32/ |
| jm-int.stdout.exp | 42 divw 00000000, 000f423f => 00000000 (00000000 00000000)
43 divw 00000000, ffffffff => 00000000 (00000000 00000000)
44 divw 000f423f, 000f423f => 00000001 (00000000 00000000)
45 divw 000f423f, ffffffff => fff0bdc1 (00000000 00000000)
46 divw ffffffff, 000f423f => 00000000 (00000000 00000000)
47 divw ffffffff, ffffffff => 00000001 (00000000 00000000)
191 divw. 00000000, 000f423f => 00000000 (20000000 00000000)
192 divw. 00000000, ffffffff => 00000000 (20000000 00000000)
193 divw. 000f423f, 000f423f => 00000001 (40000000 00000000)
194 divw. 000f423f, ffffffff => fff0bdc1 (80000000 00000000
[all...] |
| jm-insns.c | 466 __asm__ __volatile__ ("divw 17, 14, 15");
556 { &test_divw , " divw", },
600 __asm__ __volatile__ ("divw. 17, 14, 15");
690 { &test_divw_ , " divw.", },
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCSchedule.td | 171 // divw IntDivW
|
| PPCInstrInfo.td | [all...] |
| /external/qemu/tcg/ppc/ |
| tcg-target.c | 356 #define DIVW XO31(491)
[all...] |
| /external/qemu/tcg/ppc64/ |
| tcg-target.c | 346 #define DIVW XO31(491)
[all...] |
| /external/valgrind/main/none/tests/ppc64/ |
| jm-int.stdout.exp | 42 divw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
43 divw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
44 divw 0000001cbe991def, 0000001cbe991def => 0000000000000001 (00000000 00000000)
45 divw 0000001cbe991def, ffffffffffffffff => 000000004166e211 (00000000 00000000)
46 divw ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)
47 divw ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
241 divw. 0000000000000000, 0000001cbe991def => 0000000000000000 (20000000 00000000)
242 divw. 0000000000000000, ffffffffffffffff => 0000000000000000 (20000000 00000000)
243 divw. 0000001cbe991def, 0000001cbe991def => 0000000000000001 (40000000 00000000)
244 divw. 0000001cbe991def, ffffffffffffffff => 000000004166e211 (40000000 00000000
[all...] |
| /external/llvm/test/MC/X86/ |
| intel-syntax.s | 391 //CHECK: divw %bx
|
| x86-64.s | 994 //CHECK: divw %bx
|
| x86-32-coverage.s | [all...] |
| /external/valgrind/main/VEX/switchback/ |
| test_ppc_jm1.c | 748 __asm__ __volatile__ ("divw 17, 14, 15");
823 { &test_divw , " divw", },
872 __asm__ __volatile__ ("divw. 17, 14, 15");
927 { &test_divw_ , " divw.", },
[all...] |
| /external/valgrind/main/exp-bbv/tests/ppc32-linux/ |
| ll.S | 470 divw 21,19,20 # divide r19 by r20 put into r21
|
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| assyntax.h | 431 #define DIV_W(a) CHOICE(divw a, divw a, div a)
[all...] |
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | 431 #define DIV_W(a) CHOICE(divw a, divw a, div a)
[all...] |
| /external/valgrind/main/none/tests/x86/ |
| insn_basic.def | 431 divw dx.uw[464] ax.uw[58794] : r16.uw[12345] => ax.uw[2468] dx.uw[38]
432 divw dx.uw[464] ax.uw[58794] : m16.uw[12345] => ax.uw[2468] dx.uw[38]
[all...] |
| /external/valgrind/main/none/tests/amd64/ |
| insn_basic.def | [all...] |
| /external/qemu/ |
| ppc-dis.c | [all...] |
| /external/elfutils/tests/ |
| testfile44.expect.bz2 | |
| /external/valgrind/main/VEX/priv/ |
| guest_ppc_toIR.c | [all...] |
| host_ppc_defs.c | [all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/ |
| x86insn_gas.gperf | 363 divw, div_insn, 8, SUF_W, 0x06, 0, 0, 0, 0, 0, 0
[all...] |
