| /external/valgrind/main/none/tests/mips32/ |
| vfp.stdout.exp-mips32 | 29 LWC1
30 lwc1 $f0, 0($t1) :: ft 0x4095a266
31 lwc1 $f0, 4($t1) :: ft 0x66666666
32 lwc1 $f0, 8($t1) :: ft 0xbff00000
33 lwc1 $f0, 12($t1) :: ft 0x0
34 lwc1 $f0, 16($t1) :: ft 0x3ff00000
35 lwc1 $f0, 20($t1) :: ft 0x0
36 lwc1 $f0, 24($t1) :: ft 0x252a2e2b
37 lwc1 $f0, 28($t1) :: ft 0x262d2d2a
38 lwc1 $f0, 32($t1) :: ft 0xfffffff
[all...] |
| vfp.c | 67 // lwc1 $f0, 0($t1)
170 "lwc1 $f0, "#offset"($t1)\n\t" \
189 "lwc1 $f0, "#offset"($t1)\n\t" \
258 printf("LWC1\n");
259 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
260 TESTINSN5LOADw("lwc1 $f0, 4($t1)", 0, 4, f0);
261 TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
262 TESTINSN5LOADw("lwc1 $f0, 12($t1)", 0, 12, f0);
263 TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
264 TESTINSN5LOADw("lwc1 $f0, 20($t1)", 0, 20, f0)
[all...] |
| vfp.stdout.exp | 29 LWC1
30 lwc1 $f0, 0($t1) :: ft 0x4095a266
31 lwc1 $f0, 4($t1) :: ft 0x66666666
32 lwc1 $f0, 8($t1) :: ft 0xbff00000
33 lwc1 $f0, 12($t1) :: ft 0x0
34 lwc1 $f0, 16($t1) :: ft 0x3ff00000
35 lwc1 $f0, 20($t1) :: ft 0x0
36 lwc1 $f0, 24($t1) :: ft 0x252a2e2b
37 lwc1 $f0, 28($t1) :: ft 0x262d2d2a
38 lwc1 $f0, 32($t1) :: ft 0xfffffff
[all...] |
| vfp.stdout.exp-BE | 29 LWC1
30 lwc1 $f0, 0($t1) :: ft 0x4095a266
31 lwc1 $f0, 4($t1) :: ft 0x66666666
32 lwc1 $f0, 8($t1) :: ft 0xbff00000
33 lwc1 $f0, 12($t1) :: ft 0x0
34 lwc1 $f0, 16($t1) :: ft 0x3ff00000
35 lwc1 $f0, 20($t1) :: ft 0x0
36 lwc1 $f0, 24($t1) :: ft 0x252a2e2b
37 lwc1 $f0, 28($t1) :: ft 0x262d2d2a
38 lwc1 $f0, 32($t1) :: ft 0xfffffff
[all...] |
| MoveIns.c | 31 "lwc1 $" #FS ", "#offset"($t0)\n\t" \
107 "lwc1 $" #FS ", "#offset"($t0)\n\t" \
171 "lwc1 $" #FS ", "#offset"($t0)\n\t" \
216 "lwc1 $" #FS ", "#offset"($t0)\n\t" \
|
| /external/llvm/test/CodeGen/Mips/ |
| 2009-11-16-CstPoolLoad.ll | 11 ; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
13 ; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
15 ; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
17 ; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]])
19 ; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
21 ; STATIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]])
|
| mno-ldc1-sdc1.ll | 12 ; LE-PIC: lwc1 $f0, 0(${{[0-9]+}})
13 ; LE-PIC: lwc1 $f1, 4(${{[0-9]+}})
15 ; LE-STATIC: lwc1 $f0, %lo(g0)(${{[0-9]+}})
16 ; LE-STATIC: lwc1 $f1, %lo(g0+4)(${{[0-9]+}})
18 ; BE-PIC: lwc1 $f1, 0(${{[0-9]+}})
19 ; BE-PIC: lwc1 $f0, 4(${{[0-9]+}})
|
| o32_cc.ll | 18 ; CHECK: lwc1 $f12, %lo
19 ; CHECK: lwc1 $f14, %lo
29 ; CHECK: lwc1 $f12, %lo
41 ; CHECK: lwc1 $f14, %lo
89 ; CHECK: lwc1 $f12, %lo
153 ; CHECK: lwc1 $f12, %lo
154 ; CHECK: lwc1 $f14, %lo
166 ; CHECK: lwc1 $f12, %lo
181 ; CHECK: lwc1 $f14, %lo
192 ; CHECK: lwc1 $f12, %l
[all...] |
| fastcc.ll | 160 ; CHECK: lwc1 $f19
161 ; CHECK: lwc1 $f18
162 ; CHECK: lwc1 $f17
163 ; CHECK: lwc1 $f16
164 ; CHECK: lwc1 $f15
165 ; CHECK: lwc1 $f14
166 ; CHECK: lwc1 $f13
167 ; CHECK: lwc1 $f12
168 ; CHECK: lwc1 $f11
169 ; CHECK: lwc1 $f1
[all...] |
| mips64fpldst.ll | 13 ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]])
16 ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]])
|
| return-vector.ll | 62 ; CHECK: lwc1 $[[R0:[a-z0-9]+]], 28($sp)
63 ; CHECK: lwc1 $[[R1:[a-z0-9]+]], 24($sp)
64 ; CHECK: lwc1 $[[R3:[a-z0-9]+]], 20($sp)
65 ; CHECK: lwc1 $[[R4:[a-z0-9]+]], 16($sp)
131 ; CHECK-NOT: lwc1
182 ; CHECK-DAG: lwc1 $[[R0:[a-z0-9]+]], 16($sp)
|
| /development/ndk/sources/android/libportable/arch-mips/ |
| _setjmp.S | 165 lwc1 $f20, JB_F20(a0)
166 lwc1 $f21, JB_F21(a0)
167 lwc1 $f22, JB_F22(a0)
168 lwc1 $f23, JB_F23(a0)
169 lwc1 $f24, JB_F24(a0)
170 lwc1 $f25, JB_F25(a0)
171 lwc1 $f26, JB_F26(a0)
172 lwc1 $f27, JB_F27(a0)
173 lwc1 $f28, JB_F28(a0)
174 lwc1 $f29, JB_F29(a0
[all...] |
| setjmp.S | 197 lwc1 $f20, JB_F20(a0)
198 lwc1 $f21, JB_F21(a0)
199 lwc1 $f22, JB_F22(a0)
200 lwc1 $f23, JB_F23(a0)
201 lwc1 $f24, JB_F24(a0)
202 lwc1 $f25, JB_F25(a0)
203 lwc1 $f26, JB_F26(a0)
204 lwc1 $f27, JB_F27(a0)
205 lwc1 $f28, JB_F28(a0)
206 lwc1 $f29, JB_F29(a0
[all...] |
| /bionic/libc/arch-mips/bionic/ |
| _setjmp.S | 159 lwc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
160 lwc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
161 lwc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
162 lwc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
163 lwc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
164 lwc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
165 lwc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
166 lwc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
167 lwc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
168 lwc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0
[all...] |
| setjmp.S | 190 lwc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
191 lwc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
192 lwc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
193 lwc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
194 lwc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
195 lwc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
196 lwc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
197 lwc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
198 lwc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
199 lwc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 208 // lwc1 $f0, 0($2)
211 // lwc1 $f0, %lo($CPI1_0)($2)
|
| MipsSEISelDAGToDAG.cpp | 285 // lwc1 $f0, 0($2)
288 // lwc1 $f0, %lo($CPI1_0)($2)
|
| MipsInstrFPU.td | 357 def LWC1_P8 : LW_FT<"lwc1", FGR32RegsOpnd, IIFLoad, mem64, load>,
372 def LWC1 : LW_FT<"lwc1", FGR32RegsOpnd, IIFLoad, mem, load>, LW_FM<0x31>;
622 def : LoadRegImmPat<LWC1, f32, load>;
|
| MipsSEInstrInfo.cpp | 53 (Opc == Mips::LD_P8) || (Opc == Mips::LWC1) || (Opc == Mips::LWC1_P8) ||
234 Opc = IsN64 ? Mips::LWC1_P8 : Mips::LWC1;
276 expandDPLoadStore(MBB, MI, Mips::LDC1, Mips::LWC1);
|
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 341 case LWC1:
|
| lithium-gap-resolver-mips.cc | 238 __ lwc1(kLithiumScratchDouble, source_operand);
|
| /external/v8/src/mips/ |
| constants-mips.cc | 335 case LWC1:
|
| lithium-gap-resolver-mips.cc | 239 __ lwc1(kLithiumScratchDouble, source_operand);
|
| /art/runtime/ |
| disassembler_mips.cc | 139 { kITypeMask, 49u << kOpcodeShift, "lwc1", "tO", },
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 288 void Lwc1(FRegister ft, Register rs, uint16_t imm16);
|
