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  /external/llvm/test/CodeGen/ARM/
divmod-eabi.ll 59 %rem1 = srem i32 %b, %a
64 %add2 = add nsw i32 %add, %rem1
87 %rem1 = urem i32 %b, %a
92 %add2 = add nuw i32 %add, %rem1
170 %rem1 = srem i32 %b, %rem
174 %add = add nsw i32 %rem1, %rem
  /external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/
ghash-s390x.pl 64 $rem1="%r7";
186 sllg $rem1,$Zlo,3
188 ngr $rem1,$x78
212 xg $Zhi,0($rem1,$rem_4bit)
213 sllg $rem1,$Zlo,3
215 ngr $rem1,$x78
234 xg $Zhi,0($rem1,$rem_4bit)
  /external/openssl/crypto/modes/asm/
ghash-s390x.pl 64 $rem1="%r7";
186 sllg $rem1,$Zlo,3
188 ngr $rem1,$x78
212 xg $Zhi,0($rem1,$rem_4bit)
213 sllg $rem1,$Zlo,3
215 ngr $rem1,$x78
234 xg $Zhi,0($rem1,$rem_4bit)
  /external/llvm/test/Analysis/Profiling/
load-branch-weights-switches.ll 68 %rem1 = srem i32 %1, 4
69 switch i32 %rem1, label %sw.default [
  /external/llvm/test/CodeGen/X86/
2009-07-06-TwoAddrAssert.ll 127 %rem1.i = trunc i32 %rem.i to i16 ; <i16> [#uses=1]
128 %conv2.i = or i16 %rem1.i, -16384 ; <i16> [#uses=1]
  /external/qemu/fpu/
softfloat.c 3357 uint64_t rem0, rem1; local
3515 uint64_t rem0, rem1, term0, term1; local
4380 uint64_t rem0, rem1, rem2, term0, term1, term2; local
4556 uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; local
5534 uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; local
5727 uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3; local
    [all...]
softfloat-macros.h 565 uint64_t rem0, rem1, term0, term1; local
572 sub128( a0, a1, term0, term1, &rem0, &rem1 );
576 add128( rem0, rem1, b0, b1, &rem0, &rem1 );
578 rem0 = ( rem0<<32 ) | ( rem1>>32 );
  /external/chromium_org/third_party/libxml/src/
xmlschemastypes.c 3508 unsigned long rem1, rem2; local
    [all...]
  /external/libxml2/
xmlschemastypes.c 3515 unsigned long rem1, rem2; local
    [all...]

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