Lines Matching refs:instr
200 explicit FpRegister(uint32_t instr, uint16_t at_bit, uint16_t extra_at_bit) {
201 size = (instr >> 8) & 1;
202 uint32_t Vn = (instr >> at_bit) & 0xF;
203 uint32_t N = (instr >> extra_at_bit) & 1;
206 explicit FpRegister(uint32_t instr, uint16_t at_bit, uint16_t extra_at_bit,
209 uint32_t Vn = (instr >> at_bit) & 0xF;
210 uint32_t N = (instr >> extra_at_bit) & 1;
224 explicit FpRegisterRange(uint32_t instr)
225 : first(instr, 12, 22), imm8(instr & 0xFF) {}
440 uint32_t instr = (ReadU16(instr_ptr) << 16) | ReadU16(instr_ptr + 2);
448 uint32_t op1 = (instr >> 27) & 3;
453 uint32_t op2 = (instr >> 20) & 0x7F;
473 uint32_t op = (instr >> 23) & 3;
474 uint32_t W = (instr >> 21) & 1;
475 uint32_t L = (instr >> 20) & 1;
476 ArmRegister Rn(instr, 16);
503 args << RegisterList(instr);
506 uint32_t op3 = (instr >> 23) & 3;
507 uint32_t op4 = (instr >> 20) & 3;
508 // uint32_t op5 = (instr >> 4) & 0xF;
509 ArmRegister Rn(instr, 16);
510 ArmRegister Rt(instr, 12);
511 ArmRegister Rd(instr, 8);
512 uint32_t imm8 = instr & 0xFF;
514 int W = (instr >> 21) & 1;
515 int U = (instr >> 23) & 1;
516 int P = (instr >> 24) & 1;
545 int op5 = (instr >> 4) & 0xf;
550 Rd = ArmRegister(instr, 0);
553 Rd.r == Rn.r || Rd.r == Rt.r || (instr & 0xf00) != 0xf00) {
560 Rd = ArmRegister(instr, 0);
575 if (Rt.r == 13 || Rt.r == 15 || Rn.r == 15 || (instr & 0xf00) != 0xf00) {
580 int op5 = (instr >> 4) & 0xf;
592 if (Rt.r == 13 || Rt.r == 15 || Rn.r == 15 || (instr & 0xf0f) != 0xf0f) {
600 Rn.r == 15 || (instr & 0x00f) != 0x00f) {
614 int W = (instr >> 21) & 1;
615 int U = (instr >> 23) & 1;
616 int P = (instr >> 24) & 1;
641 uint32_t op3 = (instr >> 21) & 0xF;
642 uint32_t S = (instr >> 20) & 1;
643 uint32_t imm3 = ((instr >> 12) & 0x7);
644 uint32_t imm2 = ((instr >> 6) & 0x3);
646 uint32_t shift_type = ((instr >> 4) & 0x3);
647 ArmRegister Rd(instr, 8);
648 ArmRegister Rn(instr, 16);
649 ArmRegister Rm(instr, 0);
765 uint32_t op3 = (instr >> 20) & 0x3F;
766 uint32_t coproc = (instr >> 8) & 0xF;
767 uint32_t op4 = (instr >> 4) & 0x1;
779 uint32_t P = (instr >> 24) & 1;
780 uint32_t U = (instr >> 23) & 1;
781 uint32_t W = (instr >> 21) & 1;
785 uint32_t L = (instr >> 20) & 1;
786 uint32_t S = (instr >> 8) & 1;
787 ArmRegister Rn(instr, 16);
789 FpRegister d(instr, 12, 22);
790 uint32_t imm8 = instr & 0xFF;
802 args << FpRegisterRange(instr);
806 << FpRegisterRange(instr);
811 if ((instr & 0xD0) == 0x10) {
813 uint32_t L = (instr >> 20) & 1;
814 uint32_t S = (instr >> 8) & 1;
815 ArmRegister Rt2(instr, 16);
816 ArmRegister Rt(instr, 12);
817 FpRegister m(instr, 0, 5);
854 uint32_t S = (instr >> 8) & 1;
855 uint32_t Q = (instr >> 6) & 1;
856 FpRegister d(instr, 12, 22);
857 FpRegister n(instr, 16, 7);
858 FpRegister m(instr, 0, 5);
872 uint32_t imm8 = ((instr & 0xf0000u) >> 12) | (instr & 0xfu);
876 if ((instr & 0xa0) != 0) {
894 uint32_t op5 = (instr >> 16) & 0xF;
895 uint32_t op = (instr >> 7) & 1;
897 FpRegister Dd(instr, 12, 22, 1);
898 FpRegister Sd(instr, 12, 22, 0);
899 FpRegister Dm(instr, 0, 5, 1);
900 FpRegister Sm(instr, 0, 5, 0);
919 if ((instr & 0x2f) != 0) {
980 ArmRegister Rt(instr, 12);
981 FpRegister n(instr, 16, 7);
988 if (Rt.r == 13 || Rt.r == 15 || (instr & 0x6F) != 0) {
1000 uint32_t spec_reg = (instr >> 16) & 0xF;
1001 ArmRegister Rt(instr, 12);
1022 if ((instr & 0x8000) == 0 && (op2 & 0x20) == 0) {
1032 uint32_t i = (instr >> 26) & 1;
1033 uint32_t op3 = (instr >> 21) & 0xF;
1034 uint32_t S = (instr >> 20) & 1;
1035 ArmRegister Rn(instr, 16);
1036 uint32_t imm3 = (instr >> 12) & 7;
1037 ArmRegister Rd(instr, 8);
1038 uint32_t imm8 = instr & 0xFF;
1085 } else if ((instr & 0x8000) == 0 && (op2 & 0x20) != 0) {
1094 uint32_t op3 = (instr >> 20) & 0x1F;
1098 ArmRegister Rd(instr, 8);
1099 ArmRegister Rn(instr, 16);
1100 uint32_t i = (instr >> 26) & 1;
1101 uint32_t imm3 = (instr >> 12) & 0x7;
1102 uint32_t imm8 = instr & 0xFF;
1116 ArmRegister Rd(instr, 8);
1117 uint32_t i = (instr >> 26) & 1;
1118 uint32_t imm3 = (instr >> 12) & 0x7;
1119 uint32_t imm8 = instr & 0xFF;
1120 uint32_t Rn = (instr >> 16) & 0xF;
1128 ArmRegister Rd(instr, 8);
1129 ArmRegister Rn(instr, 16);
1130 uint32_t msb = instr & 0x1F;
1131 uint32_t imm2 = (instr >> 6) & 0x3;
1132 uint32_t imm3 = (instr >> 12) & 0x7;
1157 uint32_t op3 = (instr >> 12) & 7;
1158 // uint32_t op4 = (instr >> 8) & 0xF;
1170 uint32_t S = (instr >> 26) & 1;
1171 uint32_t J2 = (instr >> 11) & 1;
1172 uint32_t J1 = (instr >> 13) & 1;
1173 uint32_t imm6 = (instr >> 16) & 0x3F;
1174 uint32_t imm11 = instr & 0x7FF;
1175 uint32_t cond = (instr >> 22) & 0xF;
1184 uint32_t op5 = (instr >> 4) & 0xF;
1186 case 4: opcode << "dsb"; DumpMemoryDomain(args, instr & 0xF); break;
1187 case 5: opcode << "dmb"; DumpMemoryDomain(args, instr & 0xF); break;
1188 case 6: opcode << "isb"; DumpMemoryDomain(args, instr & 0xF); break;
1210 uint32_t S = (instr >> 26) & 1;
1211 uint32_t cond = (instr >> 22) & 0xF;
1212 uint32_t J2 = (instr >> 11) & 1;
1213 uint32_t form = (instr >> 12) & 1;
1214 uint32_t J1 = (instr >> 13) & 1;
1215 uint32_t imm10 = (instr >> 16) & 0x3FF;
1216 uint32_t imm6 = (instr >> 16) & 0x3F;
1217 uint32_t imm11 = instr & 0x7FF;
1243 uint32_t S = (instr >> 26) & 1;
1244 uint32_t J2 = (instr >> 11) & 1;
1245 uint32_t L = (instr >> 12) & 1;
1246 uint32_t J1 = (instr >> 13) & 1;
1247 uint32_t imm10 = (instr >> 16) & 0x3FF;
1248 uint32_t imm11 = instr & 0x7FF;
1276 uint32_t op3 = (instr >> 21) & 7;
1277 instr >> 6) & 0x3F;
1283 ArmRegister Rn(instr, 16);
1284 ArmRegister Rt(instr, 12);
1285 opcode << (HasBitSet(instr, 20) ? "ldrb" : "strb");
1286 if (HasBitSet(instr, 23)) {
1287 uint32_t imm12 = instr & 0xFFF;
1289 } else if ((instr & 0x800) != 0) {
1290 uint32_t imm8 = instr & 0xFF;
1293 uint32_t imm2 = (instr >> 4) & 3;
1294 ArmRegister Rm(instr, 0);
1307 ArmRegister Rn(instr, 16);
1308 ArmRegister Rt(instr, 12);
1310 if (HasBitSet(instr, 23)) {
1311 uint32_t imm12 = instr & 0xFFF;
1313 } else if ((instr & 0x800) != 0) {
1314 uint32_t imm8 = instr & 0xFF;
1317 uint32_t imm2 = (instr >> 4) & 3;
1318 ArmRegister Rm(instr, 0);
1328 ArmRegister Rn(instr, 16);
1329 ArmRegister Rt(instr, 12);
1331 if ((instr & 0x800) != 0) {
1333 uint32_t P = (instr >> 10) & 1;
1334 uint32_t U = (instr >> 9) & 1;
1335 uint32_t W = (instr >> 8) & 1;
1336 uint32_t imm8 = instr & 0xFF;
1361 ArmRegister Rn(instr, 16);
1362 ArmRegister Rt(instr, 12);
1363 ArmRegister Rm(instr, 0);
1364 uint32_t imm2 = (instr >> 4) & 3;
1374 uint32_t imm12 = instr & 0xFFF;
1394 uint32_t op3 = (instr >> 23) & 3;
1395 ArmRegister Rn(instr, 16);
1396 ArmRegister Rt(instr, 12);
1400 uint32_t imm12 = instr & 0xFFF;
1414 uint32_t imm12 = instr & 0xFFF;
1415 opcode << (HasBitSet(instr, 20) ? "ldrsb.w" : "ldrsh.w");
1441 if ((instr & 0xf0c0) == 0xf080) {
1442 uint32_t op3 = (instr >> 4) & 3;
1444 ArmRegister Rm(instr, 0);
1445 ArmRegister Rd(instr, 8);
1447 ArmRegister Rm2(instr, 16);
1464 uint32_t op3 = (instr >> 23) & 3;
1465 uint32_t op4 = (instr >> 6) & 0x3F;
1466 ArmRegister Rn(instr, 16);
1467 ArmRegister Rt(instr, 12);
1471 uint32_t imm12 = instr & 0xFFF;
1484 uint32_t imm2 = (instr >> 4) & 0xF;
1485 ArmRegister rm(instr, 0);
1493 bool p = (instr & (1 << 10)) != 0;
1494 bool w = (instr & (1 << 8)) != 0;
1495 bool u = (instr & (1 << 9)) != 0;
1498 uint32_t imm8 = instr & 0xFF;
1501 } else if (Rn.r == 13 && !p && u && w && (instr & 0xff) == 4) {
1507 uint32_t offset = (instr & 0xff);
1526 if ((instr & 0x0080f0f0) == 0x0000f000) {
1528 uint32_t shift_op = (instr >> 21) & 3;
1529 uint32_t S = (instr >> 20) & 1;
1530 ArmRegister Rd(instr, 8);
1531 ArmRegister Rn(instr, 16);
1532 ArmRegister Rm(instr, 0);
1538 op1 = (instr >> 20) & 0x7;
1539 op2 = (instr >> 4) & 0x2;
1540 ArmRegister Ra(instr, 12);
1541 ArmRegister Rn(instr, 16);
1542 ArmRegister Rm(instr, 0);
1543 ArmRegister Rd(instr, 8);
1569 op1 = (instr >> 20) & 0x7;
1570 op2 = (instr >> 4) & 0xf;
1571 ArmRegister Rn(instr, 16);
1572 ArmRegister Rm(instr, 0);
1573 ArmRegister Rd(instr, 8);
1574 ArmRegister RdHi(instr, 8);
1575 ArmRegister RdLo(instr, 12);
1614 << StringPrintf(": %08x\t%-7s ", instr, opcode.str().c_str())
1620 uint16_t instr = ReadU16(instr_ptr);
1621 bool is_32bit = ((instr & 0xF000) == 0xF000) || ((instr & 0xF800) == 0xE800);
1627 uint16_t opcode1 = instr >> 10;
1630 uint16_t opcode2 = instr >> 9;
1637 uint16_t imm5 = (instr >> 6) & 0x1F;
1638 ThumbRegister rm(instr, 3);
1639 ThumbRegister Rd(instr, 0);
1655 uint16_t imm3_or_Rm = (instr >> 6) & 7;
1656 ThumbRegister Rn(instr, 3);
1657 ThumbRegister Rd(instr, 0);
1684 ThumbRegister Rn(instr, 8);
1685 uint16_t imm8 = instr & 0xFF;
1700 uint16_t opcode2 = (instr >> 6) & 0xF;
1701 ThumbRegister rm(instr, 3);
1702 ThumbRegister rdn(instr, 0);
1707 uint16_t opcode2 = (instr >> 6) & 0x0F;
1712 uint16_t DN = (instr >> 7) & 1;
1713 ArmRegister rm(instr, 3);
1714 uint16_t Rdn = instr & 7;
1723 uint16_t DN = (instr >> 7) & 1;
1724 ArmRegister rm(instr, 3);
1725 uint16_t Rdn = instr & 7;
1733 uint16_t N = (instr >> 7) & 1;
1734 ArmRegister rm(instr, 3);
1735 uint16_t Rn = instr & 7;
1744 ArmRegister rm(instr, 3);
1753 ThumbRegister Rt(instr, 8);
1754 uint16_t imm8 = instr & 0xFF;
1761 uint16_t opA = (instr >> 12) & 0xF;
1763 uint16_t opB = (instr >> 9) & 0x7;
1764 ThumbRegister Rm(instr, 6);
1765 ThumbRegister Rn(instr, 3);
1766 ThumbRegister Rt(instr, 0);
1779 uint16_t opB = (instr >> 11) & 1;
1780 ThumbRegister Rt(instr, 8);
1781 uint16_t imm8 = instr & 0xFF;
1785 uint16_t imm5 = (instr >> 6) & 0x1F;
1786 uint16_t opB = (instr >> 11) & 1;
1787 ThumbRegister Rn(instr, 3);
1788 ThumbRegister Rt(instr, 0);
1806 int8_t imm8 = instr & 0xFF;
1807 uint32_t cond = (instr >> 8) & 0xF;
1811 } else if ((instr & 0xF800) == 0xA800) {
1813 ThumbRegister rd(instr, 8);
1814 int imm8 = instr & 0xFF;
1817 } else if ((instr & 0xF000) == 0xB000) {
1819 uint16_t opcode2 = (instr >> 5) & 0x7F;
1824 int imm7 = instr & 0x7F;
1838 uint16_t op = (instr >> 11) & 1;
1839 uint16_t i = (instr >> 9) & 1;
1840 uint16_t imm5 = (instr >> 3) & 0x1F;
1841 ThumbRegister Rn(instr, 0);
1851 uint16_t op = (instr >> 6) & 3;
1853 ThumbRegister Rm(instr, 3);
1854 ThumbRegister Rd(instr, 0);
1861 uint16_t opA = (instr >> 4) & 0xF;
1862 uint16_t opB = instr & 0xF;
1901 } else if (((instr & 0xF000) == 0x5000) || ((instr & 0xE000) == 0x6000) ||
1902 ((instr & 0xE000) == 0x8000)) {
1904 uint16_t opA = instr >> 12;
1905 // uint16_t opB = (instr >> 9) & 7;
1910 uint16_t imm5 = (instr >> 6) & 0x1F;
1911 ThumbRegister Rn(instr, 3);
1912 ThumbRegister Rt(instr, 0);
1913 opcode << ((instr & 0x800) == 0 ? "str" : "ldr");
1920 uint16_t imm8 = instr & 0xFF;
1921 ThumbRegister Rt(instr, 8);
1922 opcode << ((instr & 0x800) == 0 ? "str" : "ldr");
1930 uint16_t imm11 = instr & 0x7FFF;
1944 << StringPrintf(": %04x \t%-7s ", instr, opcode.str().c_str())
