Lines Matching refs:instr
245 Instr* pc = reinterpret_cast<Instr*>(pc_);
246 Instr* instr = reinterpret_cast<Instr*>(instructions);
248 *(pc + i) = *(instr + i);
407 const Instr kPopInstruction =
412 const Instr kPushRegPattern =
416 const Instr kPopRegPattern =
419 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
421 const Instr kLdrPCMask = 15 * B24 | 7 * B20 | 15 * B16;
422 const Instr kLdrPCPattern = 5 * B24 | L | kRegister_pc_Code * B16;
424 const Instr kLdrPpMask = 15 * B24 | 7 * B20 | 15 * B16;
425 const Instr kLdrPpPattern = 5 * B24 | L | kRegister_r8_Code * B16;
427 const Instr kVldrDPCMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
428 const Instr kVldrDPCPattern = 13 * B24 | L | kRegister_pc_Code * B16 | 11 * B8;
430 const Instr kVldrDPpMask = 15 * B24 | 3 * B20 | 15 * B16 | 15 * B8;
431 const Instr kVldrDPpPattern = 13 * B24 | L | kRegister_r8_Code * B16 | 11 * B8;
433 const Instr kBlxRegMask =
435 const Instr kBlxRegPattern =
437 const Instr kBlxIp = al | kBlxRegPattern | ip.code();
438 const Instr kMovMvnMask = 0x6d * B21 | 0xf * B16;
439 const Instr kMovMvnPattern = 0xd * B21;
440 const Instr kMovMvnFlip = B22;
441 const Instr kMovLeaveCCMask = 0xdff * B16;
442 const Instr kMovLeaveCCPattern = 0x1a0 * B16;
443 const Instr kMovwMask = 0xff * B20;
444 const Instr kMovwPattern = 0x30 * B20;
445 const Instr kMovwLeaveCCFlip = 0x5 * B21;
446 const Instr kCmpCmnMask = 0xdd * B20 | 0xf * B12;
447 const Instr kCmpCmnPattern = 0x15 * B20;
448 const Instr kCmpCmnFlip = B21;
449 const Instr kAddSubFlip = 0x6 * B21;
450 const Instr kAndBicFlip = 0xe * B21;
453 const Instr kLdrRegFpOffsetPattern =
455 const Instr kStrRegFpOffsetPattern =
457 const Instr kLdrRegFpNegOffsetPattern =
459 const Instr kStrRegFpNegOffsetPattern =
461 const Instr kLdrStrInstrTypeMask = 0xffff0000;
462 const Instr kLdrStrInstrArgumentMask = 0x0000ffff;
463 const Instr kLdrStrOffsetMask = 0x00000fff;
521 Condition Assembler::GetCondition(Instr instr) {
522 return Instruction::ConditionField(instr);
526 bool Assembler::IsBranch(Instr instr) {
527 return (instr & (B27 | B25)) == (B27 | B25);
531 int Assembler::GetBranchOffset(Instr instr) {
532 ASSERT(IsBranch(instr));
535 return ((instr & kImm24Mask) << 8) >> 6;
539 bool Assembler::IsLdrRegisterImmediate(Instr instr) {
540 return (instr & (B27 | B26 | B25 | B22 | B20)) == (B26 | B20);
544 bool Assembler::IsVldrDRegisterImmediate(Instr instr) {
545 return (instr
549 int Assembler::GetLdrRegisterImmediateOffset(Instr instr) {
550 ASSERT(IsLdrRegisterImmediate(instr));
551 bool positive = (instr & B23) == B23;
552 int offset = instr & kOff12Mask; // Zero extended offset.
557 int Assembler::GetVldrDRegisterImmediateOffset(Instr instr) {
558 ASSERT(IsVldrDRegisterImmediate(instr));
559 bool positive = (instr & B23) == B23;
560 int offset = instr & kOff8Mask; // Zero extended offset.
566 Instr Assembler::SetLdrRegisterImmediateOffset(Instr instr, int offset) {
567 ASSERT(IsLdrRegisterImmediate(instr));
572 instr = (instr & ~B23) | (positive ? B23 : 0);
574 return (instr & ~kOff12Mask) | offset;
578 Instr Assembler::SetVldrDRegisterImmediateOffset(Instr instr, int offset) {
579 ASSERT(IsVldrDRegisterImmediate(instr));
585 instr = (instr & ~B23) | (positive ? B23 : 0);
587 return (instr & ~kOff8Mask) | (offset >> 2);
591 bool Assembler::IsStrRegisterImmediate(Instr instr) {
592 return (instr & (B27 | B26 | B25 | B22 | B20)) == B26;
596 Instr Assembler::SetStrRegisterImmediateOffset(Instr instr, int offset) {
597 ASSERT(IsStrRegisterImmediate(instr));
602 instr = (instr & ~B23) | (positive ? B23 : 0);
604 return (instr & ~kOff12Mask) | offset;
608 bool Assembler::IsAddRegisterImmediate(Instr instr) {
609 return (instr & (B27 | B26 | B25 | B24 | B23 | B22 | B21)) == (B25 | B23);
613 Instr Assembler::SetAddRegisterImmediateOffset(Instr instr, int offset) {
614 ASSERT(IsAddRegisterImmediate(instr));
618 return (instr & ~kOff12Mask) | offset;
622 Register Assembler::GetRd(Instr instr) {
624 reg.code_ = Instruction::RdValue(instr);
629 Register Assembler::GetRn(Instr instr) {
631 reg.code_ = Instruction::RnValue(instr);
636 Register Assembler::GetRm(Instr instr) {
638 reg.code_ = Instruction::RmValue(instr);
643 bool Assembler::IsPush(Instr instr) {
644 return ((instr & ~kRdMask) == kPushRegPattern);
648 bool Assembler::IsPop(Instr instr) {
649 return ((instr & ~kRdMask) == kPopRegPattern);
653 bool Assembler::IsStrRegFpOffset(Instr instr) {
654 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpOffsetPattern);
658 bool Assembler::IsLdrRegFpOffset(Instr instr) {
659 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpOffsetPattern);
663 bool Assembler::IsStrRegFpNegOffset(Instr instr) {
664 return ((instr & kLdrStrInstrTypeMask) == kStrRegFpNegOffsetPattern);
668 bool Assembler::IsLdrRegFpNegOffset(Instr instr) {
669 return ((instr & kLdrStrInstrTypeMask) == kLdrRegFpNegOffsetPattern);
673 bool Assembler::IsLdrPcImmediateOffset(Instr instr) {
676 return (instr & kLdrPCMask) == kLdrPCPattern;
680 bool Assembler::IsLdrPpImmediateOffset(Instr instr) {
683 return (instr & kLdrPpMask) == kLdrPpPattern;
687 bool Assembler::IsVldrDPcImmediateOffset(Instr instr) {
690 return (instr & kVldrDPCMask) == kVldrDPCPattern;
694 bool Assembler::IsVldrDPpImmediateOffset(Instr instr) {
697 return (instr & kVldrDPpMask) == kVldrDPpPattern;
701 bool Assembler::IsTstImmediate(Instr instr) {
702 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
707 bool Assembler::IsCmpRegister(Instr instr) {
708 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask | B4)) ==
713 bool Assembler::IsCmpImmediate(Instr instr) {
714 return (instr & (B27 | B26 | I | kOpCodeMask | S | kRdMask)) ==
719 Register Assembler::GetCmpImmediateRegister(Instr instr) {
720 ASSERT(IsCmpImmediate(instr));
721 return GetRn(instr);
725 int Assembler::GetCmpImmediateRawImmediate(Instr instr) {
726 ASSERT(IsCmpImmediate(instr));
727 return instr & kOff12Mask;
750 Instr instr = instr_at(pos);
751 if (is_uint24(instr)) {
753 return instr;
755 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
756 int imm26 = ((instr & kImm24Mask) << 8) >> 6;
757 if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
758 ((instr & B24) != 0)) {
767 Instr instr = instr_at(pos);
768 if (is_uint24(instr)) {
837 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
838 if (Instruction::ConditionField(instr) == kSpecialCondition) {
841 instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
844 instr &= ~kImm24Mask;
848 instr_at_put(pos, instr | (imm24 & kImm24Mask));
862 Instr instr = instr_at(l.pos());
863 if ((instr & ~kImm24Mask) == 0) {
866 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx
867 Condition cond = Instruction::ConditionField(instr);
874 if ((instr & B24) != 0)
953 Instr* instr) {
965 if (instr != NULL) {
966 if ((*instr & kMovMvnMask) == kMovMvnPattern) {
968 *instr ^= kMovMvnFlip;
970 } else if ((*instr & kMovLeaveCCMask) == kMovLeaveCCPattern) {
973 *instr ^= kMovwLeaveCCFlip;
974 *instr |= EncodeMovwImmediate(imm32);
980 } else if ((*instr & kCmpCmnMask) == kCmpCmnPattern) {
982 *instr ^= kCmpCmnFlip;
986 Instr alu_insn = (*instr & kALUMask);
990 *instr ^= kAddSubFlip;
996 *instr ^= kAndBicFlip;
1043 Instr instr) const {
1047 !fits_shifter(imm32_, &dummy1, &dummy2, &instr)) {
1051 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
1099 void Assembler::addrmod1(Instr instr,
1104 ASSERT((instr & ~(kCondMask | kOpCodeMask | S)) == 0);
1110 !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
1116 Condition cond = Instruction::ConditionField(instr);
1117 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
1121 addrmod1(instr, rn, rd, Operand(ip));
1125 instr |= I | rotate_imm*B8 | immed_8;
1128 instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
1132 instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
1134 emit(instr | rn.code()*B16 | rd.code()*B12);
1142 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
1143 ASSERT((instr & ~(kCondMask | B | L)) == B26);
1155 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1156 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
1157 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_));
1161 instr |= offset_12;
1167 instr |= B25 | x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
1170 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
1174 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
1175 ASSERT((instr & ~(kCondMask | L | S6 | H)) == (B4 | B7));
1188 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1189 mov(ip, Operand(x.offset_), LeaveCC, Instruction::ConditionField(instr));
1190 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
1194 instr |= B | (offset_8 >> 4)*B8 | (offset_8 & 0xf);
1198 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
1200 Instruction::ConditionField(instr));
1201 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
1206 instr |= x.rm_.code();
1209 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
1213 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
1214 ASSERT((instr & ~(kCondMask | P | U | W | L)) == B27);
1217 emit(instr | rn.code()*B16 | rl);
1221 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
1224 (instr & ~(kCondMask | kCoprocessorMask | P | U | N | W | L)));
1242 emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8);
1787 Instr instr;
1799 instr = I | rotate_imm*B8 | immed_8;
1802 instr = src.rm_.code();
1804 emit(cond | instr | B24 | B21 | fields | 15*B12);
1938 emit(reinterpret_cast<Instr>(msg));
2646 static Instr EncodeVCVT(const VFPType dst_type,
3031 bool Assembler::IsMovT(Instr instr) {
3032 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
3035 return instr == 0x34*B20;
3039 bool Assembler::IsMovW(Instr instr) {
3040 instr &= ~(((kNumberOfConditions - 1) << 28) | // Mask off conditions
3043 return instr == 0x30*B20;
3047 bool Assembler::IsNop(Instr instr, int type) {
3050 return instr == (al | 13*B21 | type*B12 | type);
3369 Instr instr = instr_at(rinfo.pc());
3371 ASSERT((IsVldrDPcImmediateOffset(instr) &&
3372 GetVldrDRegisterImmediateOffset(instr) == 0));
3384 Instr instr2 = instr_at(rinfo2.pc());
3392 instr_at_put(rinfo.pc(), SetVldrDRegisterImmediateOffset(instr, delta));
3410 Instr instr = instr_at(rinfo.pc());
3413 ASSERT(!IsVldrDPcImmediateOffset(instr));
3415 if (IsLdrPcImmediateOffset(instr) &&
3416 GetLdrRegisterImmediateOffset(instr) == 0) {
3431 Instr instr2 = instr_at(rinfo2.pc());
3442 instr_at_put(rinfo.pc(), SetLdrRegisterImmediateOffset(instr, delta));
3448 ASSERT(IsMovW(instr));
3646 Instr instr = assm->instr_at(rinfo->pc());
3649 ASSERT((Assembler::IsVldrDPpImmediateOffset(instr) &&
3650 Assembler::GetVldrDRegisterImmediateOffset(instr) == 0));
3653 Assembler::SetVldrDRegisterImmediateOffset(instr, offset));
3656 ASSERT((Assembler::IsLdrPpImmediateOffset(instr) &&
3657 Assembler::GetLdrRegisterImmediateOffset(instr) == 0));
3660 Assembler::SetLdrRegisterImmediateOffset(instr, offset));
