Lines Matching refs:instr
78 int FormatVFPRegister(Instruction* instr, const char* format);
79 void PrintMovwMovt(Instruction* instr);
80 int FormatVFPinstruction(Instruction* instr, const char* format);
81 void PrintCondition(Instruction* instr);
82 void PrintShiftRm(Instruction* instr);
83 void PrintShiftImm(Instruction* instr);
84 void PrintShiftSat(Instruction* instr);
85 void PrintPU(Instruction* instr);
89 int FormatRegister(Instruction* instr, const char* option);
92 int FormatOption(Instruction* instr, const char* option);
93 void Format(Instruction* instr, const char* format);
94 void Unknown(Instruction* instr);
100 void DecodeType01(Instruction* instr);
101 void DecodeType2(Instruction* instr);
102 void DecodeType3(Instruction* instr);
103 void DecodeType4(Instruction* instr);
104 void DecodeType5(Instruction* instr);
105 void DecodeType6(Instruction* instr);
107 int DecodeType7(Instruction* instr);
109 void DecodeTypeVFP(Instruction* instr);
110 void DecodeType6CoprocessorIns(Instruction* instr);
112 void DecodeSpecialCondition(Instruction* instr);
114 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
115 void DecodeVCMP(Instruction* instr);
116 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
117 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
158 void Decoder::PrintCondition(Instruction* instr) {
159 Print(cond_names[instr->ConditionValue()]);
190 void Decoder::PrintShiftRm(Instruction* instr) {
191 ShiftOp shift = instr->ShiftField();
192 int shift_index = instr->ShiftValue();
193 int shift_amount = instr->ShiftAmountValue();
194 int rm = instr->RmValue();
198 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
202 if (instr->RegShiftValue() == 0) {
216 int rs = instr->RsValue();
226 void Decoder::PrintShiftImm(Instruction* instr) {
227 int rotate = instr->RotateValue() * 2;
228 int immed8 = instr->Immed8Value();
235 void Decoder::PrintShiftSat(Instruction* instr) {
236 int shift = instr->Bits(11, 7);
240 shift_names[instr->Bit(6) * 2],
241 instr->Bits(11, 7));
247 void Decoder::PrintPU(Instruction* instr) {
248 switch (instr->PUField()) {
301 int Decoder::FormatRegister(Instruction* instr, const char* format) {
304 int reg = instr->RnValue();
308 int reg = instr->RdValue();
312 int reg = instr->RsValue();
316 int reg = instr->RmValue();
320 int reg = instr->RtValue();
326 int rlist = instr->RlistValue();
350 int Decoder::FormatVFPRegister(Instruction* instr, const char* format) {
359 reg = instr->VFPNRegValue(precision);
361 reg = instr->VFPMRegValue(precision);
363 if ((instr->TypeValue() == 7) &&
364 (instr->Bit(24) == 0x0) &&
365 (instr->Bits(11, 9) == 0x5) &&
366 (instr->Bit(4) == 0x1)) {
368 reg = instr->Bits(19, 16) | (instr->Bit(7) << 4);
370 reg = instr->VFPDRegValue(precision);
374 int immed8 = instr->Immed8Value();
393 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
435 void Decoder::PrintMovwMovt(Instruction* instr) {
436 int imm = instr->ImmedMovwMovtValue();
437 int rd = instr->RdValue();
448 int Decoder::FormatOption(Instruction* instr, const char* format) {
451 if (instr->Bit(21) == 0) {
459 if (instr->HasB()) {
466 PrintCondition(instr);
470 double d = instr->DoubleImmedVmov();
475 uint32_t lsbit = instr->Bits(11, 7);
476 uint32_t width = instr->Bits(20, 16) + 1;
477 if (instr->Bit(21) == 0) {
489 if (instr->HasH()) {
507 instr->Bits(width + lsb - 1, lsb));
511 if (instr->HasLink()) {
519 PrintMovwMovt(instr);
524 if (instr->HasL()) {
527 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
528 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
529 if (instr->Bit(5) == 1) {
543 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
553 "%d", instr->Offset12Value());
560 (instr->Bits(19, 8) << 4) +
561 instr->Bits(3, 0));
566 int offs8 = (instr->ImmedHValue() << 4) | instr->ImmedLValue();
572 PrintPU(instr);
576 return FormatRegister(instr, format);
582 if (instr->TypeValue() == 0) {
583 PrintShiftRm(instr);
585 ASSERT(instr->TypeValue() == 1);
586 PrintShiftImm(instr);
591 PrintShiftSat(instr);
595 PrintShiftRm(instr);
600 PrintSoftwareInterrupt(instr->SvcValue());
604 if (instr->HasSign()) {
610 if (instr->HasS()) {
617 int off = (instr->SImmed24Value() << 2) + 8;
622 reinterpret_cast<byte*>(instr) + off));
638 if (instr->Bit(22) == 0) {
646 return FormatVFPinstruction(instr, format);
650 return FormatVFPRegister(instr, format);
653 if (instr->HasW()) {
671 void Decoder::Format(Instruction* instr, const char* format) {
675 format += FormatOption(instr, format);
689 Unknown(instr); \
694 // For currently unimplemented decodings the disassembler calls Unknown(instr)
696 void Decoder::Unknown(Instruction* instr) {
697 Format(instr, "unknown");
701 void Decoder::DecodeType01(Instruction* instr) {
702 int type = instr->TypeValue();
703 if ((type == 0) && instr->IsSpecialType0()) {
705 if (instr->Bits(7, 4) == 9) {
706 if (instr->Bit(24) == 0) {
708 if (instr->Bit(23) == 0) {
709 if (instr->Bit(21) == 0) {
713 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
715 if (instr->Bit(22) == 0) {
720 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
726 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
736 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
739 Unknown(instr); // not used by V8
741 } else if ((instr->Bit(20) == 0) && ((instr->Bits(7, 4) & 0xd) == 0xd)) {
743 switch (instr->PUField()) {
745 if (instr->Bit(22) == 0) {
746 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
748 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
753 if (instr->Bit(22) == 0) {
754 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
756 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
761 if (instr->Bit(22) == 0) {
762 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
764 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
769 if (instr->Bit(22) == 0) {
770 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
772 Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
784 switch (instr->PUField()) {
786 if (instr->Bit(22) == 0) {
787 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
789 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
794 if (instr->Bit(22) == 0) {
795 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
797 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
802 if (instr->Bit(22) == 0) {
803 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
805 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
810 if (instr->Bit(22) == 0) {
811 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
813 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
825 } else if ((type == 0) && instr->IsMiscType0()) {
826 if (instr->Bits(22, 21) == 1) {
827 switch (instr->BitField(7, 4)) {
829 Format(instr, "bx'cond 'rm");
832 Format(instr, "blx'cond 'rm");
835 Format(instr, "bkpt 'off0to3and8to19");
838 Unknown(instr); // not used by V8
841 } else if (instr->Bits(22, 21) == 3) {
842 switch (instr->BitField(7, 4)) {
844 Format(instr, "clz'cond 'rd, 'rm");
847 Unknown(instr); // not used by V8
851 Unknown(instr); // not used by V8
853 } else if ((type == 1) && instr->IsNopType1()) {
854 Format(instr, "nop'cond");
856 switch (instr->OpcodeField()) {
858 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
862 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
866 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
870 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
874 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
878 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
882 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
886 Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
890 if (instr->HasS()) {
891 Format(instr, "tst'cond 'rn, 'shift_op");
893 Format(instr, "movw'cond 'mw");
898 if (instr->HasS()) {
899 Format(instr, "teq'cond 'rn, 'shift_op");
908 if (instr->HasS()) {
909 Format(instr, "cmp'cond 'rn, 'shift_op");
911 Format(instr, "movt'cond 'mw");
916 if (instr->HasS()) {
917 Format(instr, "cmn'cond 'rn, 'shift_op");
926 Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
930 Format(instr, "mov'cond's 'rd, 'shift_op");
934 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
938 Format(instr, "mvn'cond's 'rd, 'shift_op");
951 void Decoder::DecodeType2(Instruction* instr) {
952 switch (instr->PUField()) {
954 if (instr->HasW()) {
955 Unknown(instr); // not used in V8
958 Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
962 if (instr->HasW()) {
963 Unknown(instr); // not used in V8
966 Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
970 Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
974 Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
986 void Decoder::DecodeType3(Instruction* instr) {
987 switch (instr->PUField()) {
989 VERIFY(!instr->HasW());
990 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
994 if (instr->Bit(4) == 0) {
995 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
997 if (instr->Bit(5) == 0) {
998 switch (instr->Bits(22, 21)) {
1000 if (instr->Bit(20) == 0) {
1001 if (instr->Bit(6) == 0) {
1002 Format(instr, "pkhbt'cond 'rd, 'rn, 'rm, lsl #'imm05@07");
1004 if (instr->Bits(11, 7) == 0) {
1005 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #32");
1007 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #'imm05@07");
1021 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
1025 switch (instr->Bits(22, 21)) {
1033 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1034 if (instr->Bits(19, 16) == 0xF) {
1035 switch (instr->Bits(11, 10)) {
1037 Format(instr, "uxtb16'cond 'rd, 'rm");
1040 Format(instr, "uxtb16'cond 'rd, 'rm, ror #8");
1043 Format(instr, "uxtb16'cond 'rd, 'rm, ror #16");
1046 Format(instr, "uxtb16'cond 'rd, 'rm, ror #24");
1057 if ((instr->Bit(20) == 0) && (instr->Bits(9, 6) == 1)) {
1058 if (instr
1059 switch (instr->Bits(11, 10)) {
1061 Format(instr, "uxtb'cond 'rd, 'rm");
1064 Format(instr, "uxtb'cond 'rd, 'rm, ror #8");
1067 Format(instr, "uxtb'cond 'rd, 'rm, ror #16");
1070 Format(instr, "uxtb'cond 'rd, 'rm, ror #24");
1074 switch (instr->Bits(11, 10)) {
1076 Format(instr, "uxtab'cond 'rd, 'rn, 'rm");
1079 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #8");
1082 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #16");
1085 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #24");
1100 if (!instr->HasW()) {
1101 if (instr->Bits(5, 4) == 0x1) {
1102 if ((instr->Bit(22) == 0x0) && (instr->Bit(20) == 0x1)) {
1104 Format(instr, "sdiv'cond'b 'rn, 'rm, 'rs");
1110 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
1114 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
1115 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
1116 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1119 if (instr->Bit(22)) {
1120 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
1122 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
1127 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) {
1128 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
1129 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16));
1131 if (instr->RmValue() == 15) {
1132 Format(instr, "bfc'cond 'rd, 'f");
1134 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1140 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
1153 void Decoder::DecodeType4(Instruction* instr) {
1154 if (instr->Bit(22) != 0) {
1156 Unknown(instr);
1158 if (instr->HasL()) {
1159 Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
1161 Format(instr, "stm'cond'pu 'rn'w, 'rlist");
1167 void Decoder::DecodeType5(Instruction* instr) {
1168 Format(instr, "b'l'cond 'target");
1172 void Decoder::DecodeType6(Instruction* instr) {
1173 DecodeType6CoprocessorIns(instr);
1177 int Decoder::DecodeType7(Instruction* instr) {
1178 if (instr->Bit(24) == 1) {
1179 if (instr->SvcValue() >= kStopCode) {
1180 Format(instr, "stop'cond 'svc");
1185 reinterpret_cast<void*>(instr
1187 *reinterpret_cast<uint32_t*>(instr
1189 *reinterpret_cast<char**>(instr
1194 Format(instr, "svc'cond 'svc");
1197 DecodeTypeVFP(instr);
1203 // void Decoder::DecodeTypeVFP(Instruction* instr)
1221 void Decoder::DecodeTypeVFP(Instruction* instr) {
1222 VERIFY((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
1223 VERIFY(instr->Bits(11, 9) == 0x5);
1225 if (instr->Bit(4) == 0) {
1226 if (instr->Opc1Value() == 0x7) {
1228 if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x1)) {
1230 if (instr->SzValue() == 0x1) {
1231 Format(instr, "vmov'cond.f64 'Dd, 'Dm");
1233 Format(instr, "vmov'cond.f32 'Sd, 'Sm");
1235 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
1237 Format(instr, "vabs'cond.f64 'Dd, 'Dm");
1238 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
1240 Format(instr, "vneg'cond.f64 'Dd, 'Dm");
1241 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
1242 DecodeVCVTBetweenDoubleAndSingle(instr);
1243 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) {
1244 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1245 } else if ((instr->Opc2Value() == 0xA) && (instr->Opc3Value() == 0x3) &&
1246 (instr->Bit(8) == 1)) {
1248 int fraction_bits = 32 - ((instr->Bits(3, 0) << 1) | instr->Bit(5));
1249 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Dd");
1252 } else if (((instr->Opc2Value() >> 1) == 0x6) &&
1253 (instr->Opc3Value() & 0x1)) {
1254 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1255 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1256 (instr->Opc3Value() & 0x1)) {
1257 DecodeVCMP(instr);
1258 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) {
1259 Format(instr, "vsqrt'cond.f64 'Dd, 'Dm");
1260 } else if (instr->Opc3Value() == 0x0) {
1261 if (instr->SzValue() == 0x1) {
1262 Format(instr, "vmov'cond.f64 'Dd, 'd");
1264 Unknown(instr); // Not used by V8.
1267 Unknown(instr); // Not used by V8.
1269 } else if (instr->Opc1Value() == 0x3) {
1270 if (instr->SzValue() == 0x1) {
1271 if (instr->Opc3Value() & 0x1) {
1272 Format(instr, "vsub'cond.f64 'Dd, 'Dn, 'Dm");
1274 Format(instr, "vadd'cond.f64 'Dd, 'Dn, 'Dm");
1277 Unknown(instr); // Not used by V8.
1279 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
1280 if (instr->SzValue() == 0x1) {
1281 Format(instr, "vmul'cond.f64 'Dd, 'Dn, 'Dm");
1283 Unknown(instr); // Not used by V8.
1285 } else if ((instr->Opc1Value() == 0x0) && !(instr->Opc3Value() & 0x1)) {
1286 if (instr->SzValue() == 0x1) {
1287 Format(instr, "vmla'cond.f64 'Dd, 'Dn, 'Dm");
1289 Unknown(instr); // Not used by V8.
1291 } else if ((instr->Opc1Value() == 0x0) && (instr->Opc3Value() & 0x1)) {
1292 if (instr->SzValue() == 0x1) {
1293 Format(instr, "vmls'cond.f64 'Dd, 'Dn, 'Dm");
1295 Unknown(instr); // Not used by V8.
1297 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
1298 if (instr->SzValue() == 0x1) {
1299 Format(instr, "vdiv'cond.f64 'Dd, 'Dn, 'Dm");
1301 Unknown(instr); // Not used by V8.
1304 Unknown(instr); // Not used by V8.
1307 if ((instr->VCValue() == 0x0) &&
1308 (instr->VAValue() == 0x0)) {
1309 DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(instr);
1310 } else if ((instr->VLValue() == 0x0) &&
1311 (instr->VCValue() == 0x1) &&
1312 (instr->Bit(23) == 0x0)) {
1313 if (instr->Bit(21) == 0x0) {
1314 Format(instr, "vmov'cond.32 'Dd[0], 'rt");
1316 Format(instr, "vmov'cond.32 'Dd[1], 'rt");
1318 } else if ((instr->VLValue() == 0x1) &&
1319 (instr->VCValue() == 0x1) &&
1320 (instr->Bit(23) == 0x0)) {
1321 if (instr->Bit(21) == 0x0) {
1322 Format(instr, "vmov'cond.32 'rt, 'Dd[0]");
1324 Format(instr, "vmov'cond.32 'rt, 'Dd[1]");
1326 } else if ((instr->VCValue() == 0x0) &&
1327 (instr->VAValue() == 0x7) &&
1328 (instr->Bits(19, 16) == 0x1)) {
1329 if (instr->VLValue() == 0) {
1330 if (instr->Bits(15, 12) == 0xF) {
1331 Format(instr, "vmsr'cond FPSCR, APSR");
1333 Format(instr, "vmsr'cond FPSCR, 'rt");
1336 if (instr->Bits(15, 12) == 0xF) {
1337 Format(instr, "vmrs'cond APSR, FPSCR");
1339 Format(instr, "vmrs'cond 'rt, FPSCR");
1348 Instruction* instr) {
1349 VERIFY((instr->Bit(4) == 1) && (instr->VCValue() == 0x0) &&
1350 (instr->VAValue() == 0x0));
1352 bool to_arm_register = (instr->VLValue() == 0x1);
1355 Format(instr, "vmov'cond 'rt, 'Sn");
1357 Format(instr, "vmov'cond 'Sn, 'rt");
1362 void Decoder::DecodeVCMP(Instruction* instr) {
1363 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1364 VERIFY(((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1365 (instr->Opc3Value() & 0x1));
1368 bool dp_operation = (instr->SzValue() == 1);
1369 bool raise_exception_for_qnan = (instr->Bit(7) == 0x1);
1372 if (instr->Opc2Value() == 0x4) {
1373 Format(instr, "vcmp'cond.f64 'Dd, 'Dm");
1374 } else if (instr->Opc2Value() == 0x5) {
1375 Format(instr, "vcmp'cond.f64 'Dd, #0.0");
1377 Unknown(instr); // invalid
1380 Unknown(instr); // Not used by V8.
1385 void Decoder::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
1386 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1387 VERIFY((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3));
1389 bool double_to_single = (instr->SzValue() == 1);
1392 Format(instr, "vcvt'cond.f32.f64 'Sd, 'Dm");
1394 Format(instr, "vcvt'cond.f64.f32 'Dd, 'Sm");
1399 void Decoder::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
1400 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1401 VERIFY(((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) ||
1402 (((instr->Opc2Value() >> 1) == 0x6) && (instr->Opc3Value() & 0x1)));
1404 bool to_integer = (instr->Bit(18) == 1);
1405 bool dp_operation = (instr->SzValue() == 1);
1407 bool unsigned_integer = (instr->Bit(16) == 0);
1411 Format(instr, "vcvt'cond.u32.f64 'Sd, 'Dm");
1413 Format(instr, "vcvt'cond.s32.f64 'Sd, 'Dm");
1417 Format(instr, "vcvt'cond.u32.f32 'Sd, 'Sm");
1419 Format(instr, "vcvt'cond.s32.f32 'Sd, 'Sm");
1423 bool unsigned_integer = (instr->Bit(7) == 0);
1427 Format(instr, "vcvt'cond.f64.u32 'Dd, 'Sm");
1429 Format(instr, "vcvt'cond.f64.s32 'Dd, 'Sm");
1433 Format(instr, "vcvt'cond.f32.u32 'Sd, 'Sm");
1435 Format(instr, "vcvt'cond.f32.s32 'Sd, 'Sm");
1447 void Decoder::DecodeType6CoprocessorIns(Instruction* instr) {
1448 VERIFY(instr->TypeValue() == 6);
1450 if (instr->CoprocessorValue() == 0xA) {
1451 switch (instr->OpcodeValue()) {
1454 if (instr->HasL()) {
1455 Format(instr, "vldr'cond 'Sd, ['rn - 4*'imm08@00]");
1457 Format(instr, "vstr'cond 'Sd, ['rn - 4*'imm08@00]");
1462 if (instr->HasL()) {
1463 Format(instr, "vldr'cond 'Sd, ['rn + 4*'imm08@00]");
1465 Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]");
1474 bool to_vfp_register = (instr->VLValue() == 0x1);
1476 Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}");
1478 Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}");
1483 Unknown(instr); // Not used by V8.
1485 } else if (instr->CoprocessorValue() == 0xB) {
1486 switch (instr->OpcodeValue()) {
1489 if (instr->Bits(7, 6) != 0 || instr->Bit(4) != 1) {
1490 Unknown(instr); // Not used by V8.
1491 } else if (instr->HasL()) {
1492 Format(instr, "vmov'cond 'rt, 'rn, 'Dm");
1494 Format(instr, "vmov'cond 'Dm, 'rt, 'rn");
1499 if (instr->HasL()) {
1500 Format(instr, "vldr'cond 'Dd, ['rn - 4*'imm08@00]");
1502 Format(instr, "vstr'cond 'Dd, ['rn - 4*'imm08@00]");
1507 if (instr->HasL()) {
1508 Format(instr, "vldr'cond 'Dd, ['rn + 4*'imm08@00]");
1510 Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]");
1519 bool to_vfp_register = (instr->VLValue() == 0x1);
1521 Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}");
1523 Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}");
1528 Unknown(instr); // Not used by V8.
1531 Unknown(instr); // Not used by V8.
1536 void Decoder::DecodeSpecialCondition(Instruction* instr) {
1537 switch (instr->SpecialValue()) {
1539 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1540 (instr->Bit(4) == 1)) {
1542 if ((instr->VdValue() & 1) != 0) Unknown(instr);
1543 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1);
1544 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1545 int imm3 = instr->Bits(21, 19);
1549 Unknown(instr);
1553 if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
1554 (instr->Bit(4) == 1)) {
1556 if ((instr->VdValue() & 1) != 0) Unknown(instr);
1557 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1);
1558 int Vm = (instr->Bit(5) << 4) | instr->VmValue();
1559 int imm3 = instr->Bits(21, 19);
1563 Unknown(instr);
1567 if (instr->Bits(21, 20) == 0) {
1569 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1570 int Rn = instr
1571 int type = instr->Bits(11, 8);
1572 int size = instr->Bits(7, 6);
1573 int align = instr->Bits(5, 4);
1574 int Rm = instr->VmValue();
1580 } else if (instr->Bits(21, 20) == 2) {
1582 int Vd = (instr->Bit(22) << 4) | instr->VdValue();
1583 int Rn = instr->VnValue();
1584 int type = instr->Bits(11, 8);
1585 int size = instr->Bits(7, 6);
1586 int align = instr->Bits(5, 4);
1587 int Rm = instr->VmValue();
1594 Unknown(instr);
1599 if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
1600 int Rn = instr->Bits(19, 16);
1601 int offset = instr->Bits(11, 0);
1605 } else if (instr->Bit(23) == 0) {
1613 Unknown(instr);
1617 Unknown(instr);
1642 Instruction* instr = Instruction::At(instr_ptr);
1646 instr->InstructionBits());
1647 if (instr->ConditionField() == kSpecialCondition) {
1648 DecodeSpecialCondition(instr);
1661 DecodeType2(instr);
1666 switch (instr->TypeValue()) {
1669 DecodeType01(instr);
1673 DecodeType2(instr);
1677 DecodeType3(instr);
1681 DecodeType4(instr);
1685 DecodeType5(instr);
1689 DecodeType6(instr);
1693 return DecodeType7(instr);
