Lines Matching full:addsd
1970 // Since we operate on +0 and/or -0, addsd and andsd have the same effect.1971 __ addsd(left_reg, right_reg);1992 __ addsd(left, right);3670 __ addsd(xmm_scratch, input_reg);3750 __ addsd(input_reg, xmm_scratch); // Convert -0 to +0.