Lines Matching refs:instr
194 Instr* pc = reinterpret_cast<Instr*>(pc_);
195 Instr* instr = reinterpret_cast<Instr*>(instructions);
197 *(pc + i) = *(instr + i);
251 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
255 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
259 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
262 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
265 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
268 const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
271 const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
274 const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
277 const Instr kRtMask = kRtFieldMask;
278 const Instr kLwSwInstrTypeMask = 0xffe00000;
279 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
280 const Instr kLwSwOffsetMask = kImm16Mask;
333 Register Assembler::GetRtReg(Instr instr) {
335 rt.code_ = (instr & kRtFieldMask) >> kRtShift;
340 Register Assembler::GetRsReg(Instr instr) {
342 rs.code_ = (instr & kRsFieldMask) >> kRsShift;
347 Register Assembler::GetRdReg(Instr instr) {
349 rd.code_ = (instr & kRdFieldMask) >> kRdShift;
354 uint32_t Assembler::GetRt(Instr instr) {
355 return (instr & kRtFieldMask) >> kRtShift;
359 uint32_t Assembler::GetRtField(Instr instr) {
360 return instr & kRtFieldMask;
364 uint32_t Assembler::GetRs(Instr instr) {
365 return (instr & kRsFieldMask) >> kRsShift;
369 uint32_t Assembler::GetRsField(Instr instr) {
370 return instr & kRsFieldMask;
374 uint32_t Assembler::GetRd(Instr instr) {
375 return (instr & kRdFieldMask) >> kRdShift;
379 uint32_t Assembler::GetRdField(Instr instr) {
380 return instr & kRdFieldMask;
384 uint32_t Assembler::GetSa(Instr instr) {
385 return (instr & kSaFieldMask) >> kSaShift;
389 uint32_t Assembler::GetSaField(Instr instr) {
390 return instr & kSaFieldMask;
394 uint32_t Assembler::GetOpcodeField(Instr instr) {
395 return instr & kOpcodeMask;
399 uint32_t Assembler::GetFunction(Instr instr) {
400 return (instr & kFunctionFieldMask) >> kFunctionShift;
404 uint32_t Assembler::GetFunctionField(Instr instr) {
405 return instr & kFunctionFieldMask;
409 uint32_t Assembler::GetImmediate16(Instr instr) {
410 return instr & kImm16Mask;
414 uint32_t Assembler::GetLabelConst(Instr instr) {
415 return instr & ~kImm16Mask;
419 bool Assembler::IsPop(Instr instr) {
420 return (instr & ~kRtMask) == kPopRegPattern;
424 bool Assembler::IsPush(Instr instr) {
425 return (instr & ~kRtMask) == kPushRegPattern;
429 bool Assembler::IsSwRegFpOffset(Instr instr) {
430 return ((instr & kLwSwInstrTypeMask) == kSwRegFpOffsetPattern);
434 bool Assembler::IsLwRegFpOffset(Instr instr) {
435 return ((instr & kLwSwInstrTypeMask) == kLwRegFpOffsetPattern);
439 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
440 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
445 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
446 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
471 bool Assembler::IsBranch(Instr instr) {
472 uint32_t opcode = GetOpcodeField(instr);
473 uint32_t rt_field = GetRtField(instr);
474 uint32_t rs_field = GetRsField(instr);
490 bool Assembler::IsEmittedConstant(Instr instr) {
491 uint32_t label_constant = GetLabelConst(instr);
496 bool Assembler::IsBeq(Instr instr) {
497 return GetOpcodeField(instr) == BEQ;
501 bool Assembler::IsBne(Instr instr) {
502 return GetOpcodeField(instr) == BNE;
506 bool Assembler::IsJump(Instr instr) {
507 uint32_t opcode = GetOpcodeField(instr);
508 uint32_t rt_field = GetRtField(instr);
509 uint32_t rd_field = GetRdField(instr);
510 uint32_t function_field = GetFunctionField(instr);
518 bool Assembler::IsJ(Instr instr) {
519 uint32_t opcode = GetOpcodeField(instr);
525 bool Assembler::IsJal(Instr instr) {
526 return GetOpcodeField(instr) == JAL;
530 bool Assembler::IsJr(Instr instr) {
531 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
535 bool Assembler::IsJalr(Instr instr) {
536 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
540 bool Assembler::IsLui(Instr instr) {
541 uint32_t opcode = GetOpcodeField(instr);
547 bool Assembler::IsOri(Instr instr) {
548 uint32_t opcode = GetOpcodeField(instr);
554 bool Assembler::IsNop(Instr instr, unsigned int type) {
557 uint32_t opcode = GetOpcodeField(instr);
558 uint32_t function = GetFunctionField(instr);
559 uint32_t rt = GetRt(instr);
560 uint32_t rd = GetRd(instr);
561 uint32_t sa = GetSa(instr);
578 int32_t Assembler::GetBranchOffset(Instr instr) {
579 ASSERT(IsBranch(instr));
580 return (static_cast<int16_t>(instr & kImm16Mask)) << 2;
584 bool Assembler::IsLw(Instr instr) {
585 return ((instr & kOpcodeMask) == LW);
589 int16_t Assembler::GetLwOffset(Instr instr) {
590 ASSERT(IsLw(instr));
591 return ((instr & kImm16Mask));
595 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
596 ASSERT(IsLw(instr));
599 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask)
606 bool Assembler::IsSw(Instr instr) {
607 instr & kOpcodeMask) == SW);
611 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
612 ASSERT(IsSw(instr));
613 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
617 bool Assembler::IsAddImmediate(Instr instr) {
618 return ((instr & kOpcodeMask) == ADDIU);
622 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
623 ASSERT(IsAddImmediate(instr));
624 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
628 bool Assembler::IsAndImmediate(Instr instr) {
629 return GetOpcodeField(instr) == ANDI;
634 Instr instr = instr_at(pos);
635 if ((instr & ~kImm16Mask) == 0) {
637 if (instr == 0) {
640 int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
645 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
648 if (IsBranch(instr)) {
649 int32_t imm18 = ((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
657 } else if (IsLui(instr)) {
658 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
659 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
674 int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
690 Instr instr = instr_at(pos);
691 if ((instr & ~kImm16Mask) == 0) {
699 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
700 if (IsBranch(instr)) {
704 instr &= ~kImm16Mask;
708 instr_at_put(pos, instr | (imm16 & kImm16Mask));
709 } else if (IsLui(instr)) {
710 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
711 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
728 instr &= ~kImm26Mask;
732 instr_at_put(pos, instr | (imm26 & kImm26Mask));
747 Instr instr = instr_at(l.pos());
748 if ((instr & ~kImm16Mask) == 0) {
751 PrintF("%d\n", instr);
773 Instr instr = instr_at(fixup_pos);
774 if (IsBranch(instr)) {
787 ASSERT(IsJ(instr) || IsLui(instr) || IsEmittedConstant(instr));
841 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
843 emit(instr);
854 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
856 emit(instr);
867 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
869 emit(instr);
880 Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift)
882 emit(instr);
893 Instr instr = opcode | fmt | (rt.code() << kRtShift)
895 emit(instr);
905 Instr instr =
907 emit(instr);
918 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
920 emit(instr);
929 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
930 emit(instr);
939 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
941 emit(instr);
949 Instr instr = opcode | address;
950 emit(instr);
1314 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1316 emit(instr);
1324 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1326 emit(instr);
1461 Instr break_instr = SPECIAL | BREAK | (code << 6);
1476 emit(reinterpret_cast<Instr>(msg));
1483 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
1485 emit(instr);
1491 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
1493 emit(instr);
1499 Instr instr =
1501 emit(instr);
1507 Instr instr =
1510 emit(instr);
1516 Instr instr =
1518 emit(instr);
1524 Instr instr =
1526 emit(instr);
1590 // Clz instr requires same GPR number in 'rd' and 'rt' fields.
1597 // Ins instr has 'rt' field as dest, and two uint5: msb, lsb.
1605 // Ext instr has 'rt' field as dest, and two uint5: msb, lsb.
1614 Instr instr = PREF | (rs.rm().code() << kRsShift) | (hint << kRtShift)
1616 emit(instr);
1877 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
1879 emit(instr);
1894 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
1895 emit(instr);
1901 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
1902 emit(instr);
1930 Instr instr = instr_at(pc);
1931 ASSERT(IsJ(instr) || IsLui(instr));
1932 if (IsLui(instr)) {
1933 Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
1934 Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
1953 uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
1961 instr &= ~kImm26Mask;
1965 instr_at_put(pc, instr | (imm26 & kImm26Mask));
2139 Instr instr1 = instr_at(pc);
2140 Instr instr2 = instr_at(pc + kInstrSize);
2165 // Patching the address must replace both instr, and flush the i-cache.
2173 Instr instr2 = instr_at(pc + kInstrSize);
2179 // Check we have the result from a li macro-instruction, using instr pair.
2180 Instr instr1 = instr_at(pc);
2206 Instr instr3 = instr_at(pc + 2 * kInstrSize);
2277 Instr instr1 = instr_at(pc);
2279 Instr instr2 = instr_at(pc + 1 * kInstrSize);
2280 Instr instr3 = instr_at(pc + 2 * kInstrSize);
