Lines Matching refs:dbg
260 DumpDBGState(const DNBArchMachARM::DBG& dbg)
265 i, i, dbg.__bvr[i], dbg.__bcr[i],
266 i, i, dbg.__wvr[i], dbg.__wcr[i]);
281 kern_return_t kret = ::thread_get_state(m_thread->MachPortNumber(), ARM_DEBUG_STATE, (thread_state_t)&m_state.dbg, &count);
320 kern_return_t kret = ::thread_set_state (m_thread->MachPortNumber(), ARM_DEBUG_STATE, (thread_state_t)&m_state.dbg, ARM_DEBUG_STATE_COUNT);
323 kern_return_t task_kret = ::task_set_state (m_thread->Process()->Task().TaskPort(), ARM_DEBUG_STATE, (thread_state_t)&m_state.dbg, ARM_DEBUG_STATE_COUNT);
356 if (kret == KERN_SUCCESS && !IsWatchpointEnabled(m_state.dbg, m_watchpoint_hw_index)) {
514 err.LogThreaded("%s: failed to read the DBG registers", __FUNCTION__);
524 m_dbg_save = m_state.dbg;
526 m_state.dbg.__bvr[i] = m_state.context.gpr.__pc & 0xFFFFFFFCu; // Set the current PC as the breakpoint address
527 m_state.dbg.__bcr[i] = BCR_M_IMVA_MISMATCH | // Stop on address mismatch
534 m_state.dbg.__bcr[i] |= BAS_IMVA_2_3;
536 m_state.dbg.__bcr[i] |= BAS_IMVA_0_1;
554 m_state.dbg.__bcr[i] |= BAS_IMVA_ALL;
562 m_state.dbg.__bcr[i] |= BAS_IMVA_ALL; // Stop when any address bits change
565 DNBLogThreadedIf(LOG_STEP, "%s: BVR%u=0x%8.8x BCR%u=0x%8.8x", __FUNCTION__, i, m_state.dbg.__bvr[i], i, m_state.dbg.__bcr[i]);
570 m_state.dbg.__bvr[j] = 0;
571 m_state.dbg.__bcr[j] = 0;
577 m_state.dbg = m_dbg_save;
789 if ((m_state.dbg.__bcr[i] & BCR_ENABLE) == 0)
797 m_state.dbg.__bvr[i] = addr & ~((nub_addr_t)3);
805 m_state.dbg.__bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
814 m_state.dbg.__bvr[i],
815 m_state.dbg.__bcr[i]);
820 m_state.dbg.__bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch
829 m_state.dbg.__bvr[i],
830 m_state.dbg.__bcr[i]);
858 m_state.dbg.__bcr[hw_index] = 0;
862 m_state.dbg.__bvr[hw_index],
864 m_state.dbg.__bcr[hw_index]);
952 if ((m_state.dbg.__wcr[i] & WCR_ENABLE) == 0)
959 //DumpDBGState(m_state.dbg);
964 m_state.dbg.__wvr[i] = addr & ~((nub_addr_t)3); // DVA (Data Virtual Address)
965 m_state.dbg.__wcr[i] = byte_address_select | // Which bytes that follow the DVA that we will watch
971 DNBLogThreadedIf(LOG_WATCHPOINTS, "DNBArchMachARM::EnableHardwareWatchpoint() adding watchpoint on address 0x%llx with control register value 0x%x", (uint64_t) m_state.dbg.__wvr[i], (uint32_t) m_state.dbg.__wcr[i]);
974 //DumpDBGState(m_state.dbg);
1006 m_state.dbg.__wcr[hw_index] |= (nub_addr_t)WCR_ENABLE;
1010 m_state.dbg.__wvr[hw_index],
1012 m_state.dbg.__wcr[hw_index]);
1041 m_state.dbg.__wcr[hw_index] &= ~((nub_addr_t)WCR_ENABLE);
1045 m_state.dbg.__wvr[hw_index],
1047 m_state.dbg.__wcr[hw_index]);
1075 //DumpDBGState(m_state.dbg);
1083 DBG &debug_state = m_state.dbg;
1140 DNBArchMachARM::IsWatchpointEnabled(const DBG &debug_state, uint32_t hw_index)
1151 DNBArchMachARM::GetWatchAddress(const DBG &debug_state, uint32_t hw_index)
