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Lines Matching refs:BrCond

107     /// BrCond          - Conditions for end of block conditional branches.
125 SmallVector<MachineOperand, 4> BrCond;
450 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
452 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
512 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
647 BBI.BrCond.clear();
649 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
652 if (BBI.BrCond.size()) {
735 if (BBI.BrCond.size()) {
741 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
771 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
800 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
817 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
835 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
850 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
858 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
1029 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1138 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1216 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1217 CvtBBI->BrCond.end());
1308 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1311 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;