Lines Matching defs:VNI
1088 if (const VNInfo *VNI = LI.getVNInfoAt(DefIdx)) {
1089 assert(VNI && "NULL valno is not allowed");
1090 if (VNI->def != DefIdx) {
1092 *OS << "Valno " << VNI->id << " is not defined at "
1352 const VNInfo *VNI,
1354 if (VNI->isUnused())
1357 const VNInfo *DefVNI = LR.getVNInfoAt(VNI->def);
1361 *OS << "Valno #" << VNI->id << '\n';
1365 if (DefVNI != VNI) {
1367 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def
1372 const MachineBasicBlock *MBB = LiveInts->getMBBFromIndex(VNI->def);
1375 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def
1380 if (VNI->isPHIDef()) {
1381 if (VNI->def != LiveInts->getMBBStartIdx(MBB)) {
1383 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def
1390 const MachineInstr *MI = LiveInts->getInstructionFromIndex(VNI->def);
1393 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
1418 *OS << "Valno #" << VNI->id << " in " << LR << '\n';
1424 if (!VNI->def.isEarlyClobber()) {
1426 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
1428 } else if (!VNI->def.isRegister()) {
1431 *OS << "Valno #" << VNI->id << " is defined at " << VNI->def << '\n';
1440 const VNInfo *VNI = S.valno;
1441 assert(VNI && "Live segment has no valno");
1443 if (VNI->id >= LR.getNumValNums() || VNI != LR.getValNumInfo(VNI->id)) {
1448 if (VNI->isUnused()) {
1460 if (S.start != MBBStartIdx && S.start != VNI->def) {
1478 if (!TargetRegisterInfo::isVirtualRegister(Reg) && VNI->isPHIDef() &&
1479 S.start == VNI->def && S.end == VNI->def.getDeadSlot())
1539 if (S.start == VNI->def && !VNI->isPHIDef()) {
1557 // Is VNI a PHI-def in the current block?
1558 bool IsPHI = VNI->isPHIDef() &&
1559 VNI->def == LiveInts->getMBBStartIdx(MFI);
1561 // Check that VNI is live-out of all predecessors.
1570 *OS << "Valno #" << VNI->id << " live into BB#" << MFI->getNumber()
1577 if (!IsPHI && PVNI != VNI) {
1581 << "\nValno #" << VNI->id << " live into BB#" << MFI->getNumber()