Home | History | Annotate | Download | only in CodeGen

Lines Matching defs:DefMI

156   const MachineInstr *DefMI, unsigned DefOperIdx,
160 return TII->defaultDefLatency(&SchedModel, DefMI);
165 OperLatency = TII->getOperandLatency(&InstrItins, DefMI, DefOperIdx,
169 unsigned DefClass = DefMI->getDesc().getSchedClass();
176 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, DefMI);
184 TII->defaultDefLatency(&SchedModel, DefMI));
188 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);
189 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);
212 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit()
213 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()
218 << *DefMI;
225 return DefMI->isTransient() ? 0 : TII->defaultDefLatency(&SchedModel, DefMI);
255 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
269 unsigned Reg = DefMI->getOperand(DefOperIdx).getReg();
270 const MachineFunction &MF = *DefMI->getParent()->getParent();
273 return computeInstrLatency(DefMI);
278 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);