Lines Matching refs:Reg
62 /// the source reg along with the FrameIndex of the loaded stack slot. If
89 if (Mips::GPR32RegClass.contains(DestReg)) { // Copy to CPU Reg.
117 else if (Mips::GPR32RegClass.contains(SrcReg)) { // Copy from CPU Reg.
145 else if (Mips::GPR64RegClass.contains(DestReg)) { // Copy to CPU64 Reg.
155 else if (Mips::GPR64RegClass.contains(SrcReg)) { // Copy from CPU64 Reg.
163 else if (Mips::MSA128BRegClass.contains(DestReg)) { // Copy to MSA reg
371 unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
372 BuildMI(MBB, I, DL, get(ADDu), SP).addReg(SP).addReg(Reg, RegState::Kill);
377 /// result of adding register REG and immediate IMM.
401 unsigned Reg = RegInfo.createVirtualRegister(RC);
404 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
406 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)
411 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)
417 return Reg;
