Lines Matching full:vreg
1294 // VReg or and SReg. In order to get a more accurate
1657 unsigned VReg = MI->getOperand(0).getReg();
1674 MRI.setRegClass(VReg, RC);
1716 SDValue VReg = AMDGPUTargetLowering::CreateLiveInRegister(DAG, RC, Reg, VT);
1719 cast<RegisterSDNode>(VReg)->getReg(), VT);
