Lines Matching defs:OPCODE
44 : Op0(Op0In), Op1(Op1In), Opcode(0), ICmpType(0), CCValid(0), CCMask(0) {}
49 // The opcode that should be used to compare Op0 and Op1.
50 unsigned Opcode;
55 // The mask of CC values that Opcode can produce.
1395 // a comparison of type Opcode between the AND result and CmpVal.
1562 C.Opcode = SystemZISD::TM;
1579 C.Opcode = SystemZISD::FCMP;
1583 C.Opcode = SystemZISD::ICMP;
1616 if (C.Opcode == SystemZISD::ICMP)
1619 if (C.Opcode == SystemZISD::TM) {
1625 return DAG.getNode(C.Opcode, DL, MVT::Glue, C.Op0, C.Op1);
1644 // Extend extends Op0 to a GR128, and Opcode performs the GR128 operation
1648 unsigned Extend, unsigned Opcode,
1652 SDValue Result = DAG.getNode(Opcode, DL, MVT::Untyped,
1747 if (C.Opcode == SystemZISD::ICMP &&
2094 unsigned Opcode;
2099 Opcode = SystemZISD::SDIVREM32;
2102 Opcode = SystemZISD::SDIVREM32;
2104 Opcode = SystemZISD::SDIVREM64;
2110 lowerGR128Binary(DAG, DL, VT, SystemZ::AEXT128_64, Opcode,
2211 // two into the fullword ATOMIC_LOADW_* operation given by Opcode.
2214 unsigned Opcode) const {
2232 if (Opcode == SystemZISD::ATOMIC_LOADW_SUB)
2234 Opcode = SystemZISD::ATOMIC_LOADW_ADD;
2258 if (Opcode != SystemZISD::ATOMIC_SWAPW)
2261 if (Opcode == SystemZISD::ATOMIC_LOADW_AND ||
2262 Opcode == SystemZISD::ATOMIC_LOADW_NAND)
2270 SDValue AtomicOp = DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops,
2478 const char *SystemZTargetLowering::getTargetNodeName(unsigned Opcode) const {
2479 #define OPCODE(NAME) case SystemZISD::NAME: return "SystemZISD::" #NAME
2480 switch (Opcode) {
2481 OPCODE(RET_FLAG);
2482 OPCODE(CALL);
2483 OPCODE(SIBCALL);
2484 OPCODE(PCREL_WRAPPER);
2485 OPCODE(PCREL_OFFSET);
2486 OPCODE(IABS);
2487 OPCODE(ICMP);
2488 OPCODE(FCMP);
2489 OPCODE(TM);
2490 OPCODE(BR_CCMASK);
2491 OPCODE(SELECT_CCMASK);
2492 OPCODE(ADJDYNALLOC);
2493 OPCODE(EXTRACT_ACCESS);
2494 OPCODE(UMUL_LOHI64);
2495 OPCODE(SDIVREM64);
2496 OPCODE(UDIVREM32);
2497 OPCODE(UDIVREM64);
2498 OPCODE(MVC);
2499 OPCODE(MVC_LOOP);
2500 OPCODE(NC);
2501 OPCODE(NC_LOOP);
2502 OPCODE(OC);
2503 OPCODE(OC_LOOP);
2504 OPCODE(XC);
2505 OPCODE(XC_LOOP);
2506 OPCODE(CLC);
2507 OPCODE(CLC_LOOP);
2508 OPCODE(STRCMP);
2509 OPCODE(STPCPY);
2510 OPCODE(SEARCH_STRING);
2511 OPCODE(IPM);
2512 OPCODE(SERIALIZE);
2513 OPCODE(ATOMIC_SWAPW);
2514 OPCODE(ATOMIC_LOADW_ADD);
2515 OPCODE(ATOMIC_LOADW_SUB);
2516 OPCODE(ATOMIC_LOADW_AND);
2517 OPCODE(ATOMIC_LOADW_OR);
2518 OPCODE(ATOMIC_LOADW_XOR);
2519 OPCODE(ATOMIC_LOADW_NAND);
2520 OPCODE(ATOMIC_LOADW_MIN);
2521 OPCODE(ATOMIC_LOADW_MAX);
2522 OPCODE(ATOMIC_LOADW_UMIN);
2523 OPCODE(ATOMIC_LOADW_UMAX);
2524 OPCODE(ATOMIC_CMP_SWAPW);
2525 OPCODE(PREFETCH);
2528 #undef OPCODE
2534 unsigned Opcode = N->getOpcode();
2535 if (Opcode == ISD::SIGN_EXTEND) {
2659 // CONDITION is available, STOCOpcode is its opcode, otherwise it is 0.
3117 unsigned Opcode) const {
3132 MachineBasicBlock *EndMBB = (Length > 256 && Opcode == SystemZ::CLC ?
3173 // Opcode DestDisp(256,%ThisDestReg), SrcDisp(%ThisSrcReg)
3189 if (Opcode == SystemZ::MVC)
3193 BuildMI(MBB, DL, TII->get(Opcode))
3254 BuildMI(*MBB, MI, DL, TII->get(Opcode))
3283 // Opcode until CC != 3.
3287 unsigned Opcode) const {
3330 BuildMI(MBB, DL, TII->get(Opcode))
