Lines Matching defs:Opcode
47 const char *llvm::X86Disassembler::GetInstrName(unsigned Opcode,
50 return MII->getName(Opcode);
323 uint32_t Opcode = mcInst.getOpcode();
330 if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri &&
331 Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri &&
332 Opcode != X86::DPPSrri && Opcode != X86::DPPDrri &&
333 Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri &&
334 Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri &&
335 Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri &&
336 Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri &&
337 Opcode != X86::VDPPSYrmi && Opcode != X86::VDPPDrri &&
338 Opcode != X86::VINSERTPSrr)
485 uint32_t Opcode = mcInst.getOpcode();
486 bool IndexIs128 = (Opcode == X86::VGATHERDPDrm ||
487 Opcode == X86::VGATHERDPDYrm ||
488 Opcode == X86::VGATHERQPDrm ||
489 Opcode == X86::VGATHERDPSrm ||
490 Opcode == X86::VGATHERQPSrm ||
491 Opcode == X86::VPGATHERDQrm ||
492 Opcode == X86::VPGATHERDQYrm ||
493 Opcode == X86::VPGATHERQQrm ||
494 Opcode == X86::VPGATHERDDrm ||
495 Opcode == X86::VPGATHERQDrm);
496 bool IndexIs256 = (Opcode == X86::VGATHERQPDYrm ||
497 Opcode == X86::VGATHERDPSYrm ||
498 Opcode == X86::VGATHERQPSYrm ||
499 Opcode == X86::VGATHERDPDZrm ||
500 Opcode == X86::VPGATHERDQZrm ||
501 Opcode == X86::VPGATHERQQYrm ||
502 Opcode == X86::VPGATHERDDYrm ||
503 Opcode == X86::VPGATHERQDYrm);
504 bool IndexIs512 = (Opcode == X86::VGATHERQPDZrm ||
505 Opcode == X86::VGATHERDPSZrm ||
506 Opcode == X86::VGATHERQPSZrm ||
507 Opcode == X86::VPGATHERQQZrm ||
508 Opcode == X86::VPGATHERDDZrm ||
509 Opcode == X86::VPGATHERQDZrm);
782 // opcode to those instead of the rep and repne opcodes.
