Lines Matching defs:MF
39 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
40 return !MF.getFrameInfo()->hasVarSizedObjects();
46 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
47 const MachineFrameInfo *MFI = MF.getFrameInfo();
48 const MachineModuleInfo &MMI = MF.getMMI();
49 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
51 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
52 RegInfo->needsStackRealignment(MF) ||
55 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
94 const MachineFunction *MF = MBB.getParent();
95 const Function *F = MF->getFunction();
96 if (!F || MF->getMMI().callsEHReturn())
296 static bool isEAXLiveIn(MachineFunction &MF) {
297 for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(),
298 EE = MF.getRegInfo().livein_end(); II != EE; ++II) {
313 MachineFunction &MF = *MBB.getParent();
314 MachineFrameInfo *MFI = MF.getFrameInfo();
315 MachineModuleInfo &MMI = MF.getMMI();
317 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
343 static bool usesTheStack(const MachineFunction &MF) {
344 const MachineRegisterInfo &MRI = MF.getRegInfo();
437 void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
438 MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
440 MachineFrameInfo *MFI = MF.getFrameInfo();
441 const Function *Fn = MF.getFunction();
443 static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo());
444 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
445 MachineModuleInfo &MMI = MF.getMMI();
446 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
449 bool HasFP = hasFP(MF);
450 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
455 MF.getTarget().getMCAsmInfo()->getExceptionHandlingType() ==
463 unsigned FramePtr = RegInfo->getFrameRegister(MF);
492 !RegInfo->needsStackRealignment(MF) &&
496 !usesTheStack(MF) && // Don't push and pop.
497 !MF.shouldSplitStack()) { // Regular stack
538 if (RegInfo->needsStackRealignment(MF)) {
598 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
634 if (RegInfo->needsStackRealignment(MF)) {
681 bool isEAXAlive = isEAXLiveIn(MF);
726 MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm),
788 int Offset = getFrameIndexOffset(MF, Info.getFrameIdx());
805 if (RegInfo->hasBasePointer(MF)) {
832 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
834 const MachineFrameInfo *MFI = MF.getFrameInfo();
835 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
837 static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo());
838 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
843 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
849 unsigned FramePtr = RegInfo->getFrameRegister(MF);
887 if (hasFP(MF)) {
890 if (RegInfo->needsStackRealignment(MF)) {
929 if (RegInfo->needsStackRealignment(MF) || MFI->hasVarSizedObjects()) {
930 if (RegInfo->needsStackRealignment(MF))
1011 NewMI->copyImplicitOps(MF, MBBI);
1029 int X86FrameLowering::getFrameIndexOffset(const MachineFunction &MF,
1032 static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
1033 const MachineFrameInfo *MFI = MF.getFrameInfo();
1037 if (RegInfo->hasBasePointer(MF)) {
1038 assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!");
1046 } else if (RegInfo->needsStackRealignment(MF)) {
1056 if (!hasFP(MF))
1063 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1072 int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
1075 static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
1079 if (RegInfo->hasBasePointer(MF))
1081 else if (RegInfo->needsStackRealignment(MF))
1084 FrameReg = RegInfo->getFrameRegister(MF);
1085 return getFrameIndexOffset(MF, FI);
1089 MachineFunction &MF, const TargetRegisterInfo *TRI,
1091 MachineFrameInfo *MFI = MF.getFrameInfo();
1093 static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo());
1095 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1100 if (hasFP(MF)) {
1108 unsigned FPReg = RegInfo->getFrameRegister(MF);
1159 MachineFunction &MF = *MBB.getParent();
1160 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
1161 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
1207 MachineFunction &MF = *MBB.getParent();
1208 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
1209 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
1236 X86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
1238 MachineFrameInfo *MFI = MF.getFrameInfo();
1240 static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo());
1243 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1261 if (RegInfo->hasBasePointer(MF))
1262 MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());
1266 HasNestArgument(const MachineFunction *MF) {
1267 const Function *F = MF->getFunction();
1281 GetScratchRegister(bool Is64Bit, const MachineFunction &MF, bool Primary) {
1282 CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv();
1295 bool IsNested = HasNestArgument(&MF);
1314 X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const {
1315 MachineBasicBlock &prologueMBB = MF.front();
1316 MachineFrameInfo *MFI = MF.getFrameInfo();
1317 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
1319 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
1324 unsigned ScratchReg = GetScratchRegister(Is64Bit, MF, true);
1325 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
1328 if (MF.getFunction()->isVarArg())
1343 MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
1344 MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
1345 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1350 IsNested = HasNestArgument(&MF);
1364 MF.push_front(allocMBB);
1365 MF.push_front(checkMBB);
1429 ScratchReg2 = GetScratchRegister(Is64Bit, MF, true);
1433 ScratchReg2 = GetScratchRegister(Is64Bit, MF, false);
1437 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
1441 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
1478 MF.getRegInfo().setPhysRegUsed(X86::R10);
1479 MF.getRegInfo().setPhysRegUsed(X86::R11);
1506 MF.verify();
1525 void X86FrameLowering::adjustForHiPEPrologue(MachineFunction &MF) const {
1526 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
1527 MachineFrameInfo *MFI = MF.getFrameInfo();
1529 static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo())
1531 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
1538 unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
1539 MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
1555 for (MachineFunction::iterator MBBI = MF.begin(), MBBE = MF.end();
1595 MachineBasicBlock &prologueMBB = MF.front();
1596 MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
1597 MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
1605 MF.push_front(incStackMBB);
1606 MF.push_front(stackCheckMBB);
1626 ScratchReg = GetScratchRegister(Is64Bit, MF, true);
1627 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
1653 MF.verify();
1658 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
1660 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
1662 *static_cast<const X86RegisterInfo *>(MF.getTarget().getRegisterInfo());
1664 bool reseveCallFrame = hasReservedCallFrame(MF);
1667 const X86Subtarget &STI = MF.getTarget().getSubtarget<X86Subtarget>();
1686 MF.getTarget().getFrameLowering()->getStackAlignment();
1691 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)),
1703 New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
1724 MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
