Lines Matching full:vptr
24 ; CHECK: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
25 ; CHECK: DS_READ_B32 [[VPTR]]
35 ; CHECK: V_MOV_B32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
36 ; CHECK: DS_READ_B32 v{{[0-9]+}}, [[VPTR]], 0x4,
48 ; CHECK: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
49 ; CHECK: DS_READ_B32 [[VPTR]]
120 ; CHECK: V_MOV_B32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
122 ; CHECK: DS_WRITE_B32 [[VPTR]], [[VAL]], 0x4
132 ; CHECK: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
133 ; CHECK: DS_WRITE_B32 [[VPTR]], v{{[0-9]+}}, 0
