Lines Matching refs:CPUMIPSState
564 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUMIPSState, CP0_SRSCtl));
587 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUMIPSState, CP0_SRSCtl));
604 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
609 tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
614 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
619 tcg_gen_st_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
625 tcg_gen_ld_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
640 tcg_gen_st_i64(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].d));
780 static inline void restore_cpu_state (CPUMIPSState *env, DisasContext *ctx)
878 static inline void check_insn(CPUMIPSState *env, DisasContext *ctx, int flags)
929 tcg_gen_st_tl(t0, cpu_env, offsetof(CPUMIPSState, lladdr)); \
930 tcg_gen_st_tl(ret, cpu_env, offsetof(CPUMIPSState, llval)); \
956 tcg_gen_st_tl(arg2, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr)); \
959 tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUMIPSState, lladdr)); \
962 tcg_gen_st_tl(t0, cpu_env, offsetof(CPUMIPSState, llreg)); \
963 tcg_gen_st_tl(arg1, cpu_env, offsetof(CPUMIPSState, llnewval)); \
1257 static void gen_arith_imm (CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
1344 static void gen_logic_imm (CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm)
1386 static void gen_slt_imm (CPUMIPSState *env, uint32_t opc, int rt, int rs, int16_t imm)
1414 static void gen_shift_imm(CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
1553 static void gen_arith (CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
1734 static void gen_cond_move (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
1771 static void gen_logic (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
1831 static void gen_slt (CPUMIPSState *env, uint32_t opc, int rd, int rs, int rt)
1862 static void gen_shift (CPUMIPSState *env, DisasContext *ctx, uint32_t opc,
2905 static void gen_mfc0 (CPUMIPSState *env, DisasContext *ctx, TCGv arg, int reg, int sel)
2916 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index));
2946 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEControl));
2951 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0));
2956 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf1));
2961 gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_YQMask));
2966 gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPESchedule));
2971 gen_mfc0_load64(arg, offsetof(CPUMIPSState, CP0_VPEScheFBack));
2976 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEOpt));
2986 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0));
3032 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1));
3043 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context));
3058 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageMask));
3063 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageGrain));
3073 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Wired));
3078 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf0));
3083 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1));
3088 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2));
3093 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf3));
3098 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf4));
3109 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna));
3119 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
3148 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi));
3159 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare));
3170 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Status));
3175 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_IntCtl));
3180 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl));
3185 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
3195 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
3205 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
3216 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PRid));
3221 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_EBase));
3231 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config0));
3235 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config1));
3239 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config2));
3243 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3));
3249 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config6));
3253 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config7));
3295 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext));
3308 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Framemask));
3349 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_DEPC));
3360 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0));
3415 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagLo));
3422 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
3435 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi));
3442 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi));
3452 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
3464 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
3482 static void gen_mtc0 (CPUMIPSState *env, DisasContext *ctx, TCGv arg, int reg, int sel)
3546 gen_mtc0_store64(arg, offsetof(CPUMIPSState, CP0_VPESchedule));
3551 gen_mtc0_store64(arg, offsetof(CPUMIPSState, CP0_VPEScheFBack));
3755 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
3778 gen_mtc0_store64(arg, offsetof(CPUMIPSState, CP0_EPC));
3938 gen_mtc0_store64(arg, offsetof(CPUMIPSState, CP0_DEPC));
4041 gen_mtc0_store64(arg, offsetof(CPUMIPSState, CP0_ErrorEPC));
4052 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
4078 static void gen_dmfc0 (CPUMIPSState *env, DisasContext *ctx, TCGv arg, int reg, int sel)
4089 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Index));
4119 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEControl));
4124 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf0));
4129 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEConf1));
4134 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_YQMask));
4139 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_VPESchedule));
4144 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_VPEScheFBack));
4149 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_VPEOpt));
4159 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0));
4204 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1));
4214 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_Context));
4228 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageMask));
4233 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PageGrain));
4243 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Wired));
4248 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf0));
4253 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1));
4258 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2));
4263 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf3));
4268 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf4));
4279 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_HWREna));
4289 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
4317 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EntryHi));
4327 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare));
4338 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Status));
4343 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_IntCtl));
4348 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSCtl));
4353 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
4363 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
4373 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
4383 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_PRid));
4388 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_EBase));
4398 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config0));
4402 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config1));
4406 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config2));
4410 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config3));
4415 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config6));
4419 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Config7));
4460 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_XContext));
4471 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Framemask));
4512 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_DEPC));
4522 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Performance0));
4578 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagLo));
4585 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
4598 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi));
4605 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi));
4615 tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
4626 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
4644 static void gen_dmtc0 (CPUMIPSState *env, DisasContext *ctx, TCGv arg, int reg, int sel)
4708 tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_VPESchedule));
4713 tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_VPEScheFBack));
4921 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_SRSMap));
4944 tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
5091 tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_DEPC));
5194 tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
5205 gen_mtc0_store32(arg, offsetof(CPUMIPSState, CP0_DESAVE));
5231 static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
5395 static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
5559 static void gen_cp0 (CPUMIPSState *env, DisasContext *ctx, uint32_t opc, int rt, int rd)
5682 static void gen_compute_branch1 (CPUMIPSState *env, DisasContext *ctx, uint32_t op,
7635 static void decode_opc (CPUMIPSState *env, DisasContext *ctx)
7883 tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUMIPSState, tls_value));
8286 gen_intermediate_code_internal (CPUMIPSState *env, TranslationBlock *tb,
8429 void gen_intermediate_code (CPUMIPSState *env, struct TranslationBlock *tb)
8434 void gen_intermediate_code_pc (CPUMIPSState *env, struct TranslationBlock *tb)
8439 static void fpu_dump_state(CPUMIPSState *env, FILE *f,
8481 cpu_mips_check_sign_extensions (CPUMIPSState *env, FILE *f,
8512 CPUMIPSState *env = cpu->env_ptr;
8550 offsetof(CPUMIPSState, active_tc.gpr[i]),
8553 offsetof(CPUMIPSState, active_tc.PC), "PC");
8556 offsetof(CPUMIPSState, active_tc.HI[i]),
8559 offsetof(CPUMIPSState, active_tc.LO[i]),
8562 offsetof(CPUMIPSState, active_tc.ACX[i]),
8566 offsetof(CPUMIPSState, active_tc.DSPControl),
8569 offsetof(CPUMIPSState, bcond), "bcond");
8571 offsetof(CPUMIPSState, btarget), "btarget");
8573 offsetof(CPUMIPSState, hflags), "hflags");
8576 offsetof(CPUMIPSState, active_fpu.fcr0),
8579 offsetof(CPUMIPSState, active_fpu.fcr31),
8586 CPUMIPSState *cpu_mips_init (const char *cpu_model)
8589 CPUMIPSState *env;
8617 CPUMIPSState *env = cpu->env_ptr;
8624 memset(env, 0, offsetof(CPUMIPSState, breakpoints));
8721 void restore_state_to_opc(CPUMIPSState *env, TranslationBlock *tb, int pc_pos)
