Lines Matching refs:XS
291 /* Extract XS (store source register) field, instr[0,25:21] */
6376 /* X-Form, XS-Form */
7006 UChar XS = ifieldRegXS( theInstr );
7010 DIP("mfvsrd r%u,vsr%d\n", rA_addr, (UInt)XS);
7012 /* XS = SX || S
7019 assign( vS, getVSReg( XS ) );
7028 UChar XS = ifieldRegXS( theInstr );
7032 DIP("mfvsrwz r%u,vsr%d\n", rA_addr, (UInt)XS);
7033 /* XS = SX || S
7041 assign( vS, getVSReg( XS ) );
7057 /* XS = SX || S
7083 /* XS = SX || S
7107 /* XS = SX || S
12414 /* The xvcvsp{s|u}xws instruction is similar to vct{s|u}xs, except if src is a NaN,
15181 UChar XS = ifieldRegXS( theInstr );
15196 assign( vS, getVSReg( XS ) );
15205 DIP("stxsiwx %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
15215 DIP("stxsspx %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
15227 DIP("stxsdx %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
15235 DIP("stxvd2x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
15250 DIP("stxvw4x %d,r%u,r%u\n", (UInt)XS, rA_addr, rB_addr);
