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Lines Matching full:r0hi

4254       HReg r1Hi, r1Lo, r0Hi, r0Lo;
4256       iselDVecExpr(&r0Hi, &r0Lo, env, e->Iex.ITE.iffalse);
4262       addInstr(env, AMD64Instr_SseCMov(cc ^ 1, r0Hi, dstHi));