Lines Matching refs:NUnary
1049 if (i->ARMin.NUnary.op == ARMneon_COPY ||
1050 i->ARMin.NUnary.op == ARMneon_NOT ||
1051 i->ARMin.NUnary.op == ARMneon_VCVTF32toF16||
1052 i->ARMin.NUnary.op == ARMneon_VCVTF16toF32||
1053 i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||
1054 i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||
1055 i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||
1056 i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF ||
1057 i->ARMin.NUnary.op == ARMneon_VCVTFtoS ||
1058 i->ARMin.NUnary.op == ARMneon_VCVTFtoU ||
1059 i->ARMin.NUnary.op == ARMneon_VCVTStoF ||
1060 i->ARMin.NUnary.op == ARMneon_VCVTUtoF)
1062 if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||
1063 i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||
1064 i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {
1066 size = i->ARMin.NUnary.size;
1077 return showARMNeonDataSize_wrk(i->ARMin.NUnary.size);
1413 i->ARMin.NUnary.op = op;
1414 i->ARMin.NUnary.src = nQ;
1415 i->ARMin.NUnary.dst = dQ;
1416 i->ARMin.NUnary.size = size;
1417 i->ARMin.NUnary.Q = Q;
1894 showARMNeonUnOp(i->ARMin.NUnary.op),
1895 showARMNeonUnOpDataType(i->ARMin.NUnary.op),
1897 ppHRegARM(i->ARMin.NUnary.dst);
1899 ppHRegARM(i->ARMin.NUnary.src);
1900 if (i->ARMin.NUnary.op == ARMneon_EQZ)
1902 if (i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedS ||
1903 i->ARMin.NUnary.op == ARMneon_VCVTFtoFixedU ||
1904 i->ARMin.NUnary.op == ARMneon_VCVTFixedStoF ||
1905 i->ARMin.NUnary.op == ARMneon_VCVTFixedUtoF) {
1906 vex_printf(", #%d", i->ARMin.NUnary.size);
1908 if (i->ARMin.NUnary.op == ARMneon_VQSHLNSS ||
1909 i->ARMin.NUnary.op == ARMneon_VQSHLNUU ||
1910 i->ARMin.NUnary.op == ARMneon_VQSHLNUS) {
1912 size = i->ARMin.NUnary.size;
2267 addHRegUse(u, HRmWrite, i->ARMin.NUnary.dst);
2268 addHRegUse(u, HRmRead, i->ARMin.NUnary.src);
2468 i->ARMin.NUnary.src = lookupHRegRemap(m, i->ARMin.NUnary.src);
2469 i->ARMin.NUnary.dst = lookupHRegRemap(m, i->ARMin.NUnary.dst);
2552 if (i->ARMin.NUnary.op == ARMneon_COPY) {
2553 *src = i->ARMin.NUnary.src;
2554 *dst = i->ARMin.NUnary.dst;
4007 UInt Q = i->ARMin.NUnary.Q ? 1 : 0;
4008 UInt regD = (hregClass(i->ARMin.NUnary.dst) == HRcVec128)
4009 ? (qregNo(i->ARMin.NUnary.dst) << 1)
4010 : dregNo(i->ARMin.NUnary.dst);
4013 UInt sz1 = i->ARMin.NUnary.size >> 1;
4014 UInt sz2 = i->ARMin.NUnary.size & 1;
4015 UInt sz = i->ARMin.NUnary.size;
4018 if (i->ARMin.NUnary.op != ARMneon_DUP) {
4019 regM = (hregClass(i->ARMin.NUnary.src) == HRcVec128)
4020 ? (qregNo(i->ARMin.NUnary.src) << 1)
4021 : dregNo(i->ARMin.NUnary.src);
4024 regM = iregNo(i->ARMin.NUnary.src);
4029 switch (i->ARMin.NUnary.op) {
4091 sz1 = i->ARMin.NUnary.size == 0 ? 1 : 0;
4092 sz2 = i->ARMin.NUnary.size == 1 ? 1 : 0;
