Lines Matching refs:Iex
212 && e->Iex.Const.con->tag == Ico_U8
213 && e->Iex.Const.con->Ico.U8 == 0;
813 && guard->Iex.Const.con->tag == Ico_U1
814 && guard->Iex.Const.con->Ico.U1 == True) {
968 && guard->Iex.Const.con->tag == Ico_U1
969 && guard->Iex.Const.con->Ico.U1 == True) {
1145 && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) {
1379 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
1385 if (e->Iex.Load.end != Iend_BE)
1388 am_addr = iselWordExpr_AMode( env, e->Iex.Load.addr, ty/*of xfer*/ );
1401 switch (e->Iex.Binop.op) {
1419 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1425 e->Iex.Binop.arg2);
1429 e->Iex.Binop.arg2);
1439 switch (e->Iex.Binop.op) {
1452 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1458 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
1460 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
1495 if (e->Iex.Binop.op == Iop_DivS32 ||
1496 e->Iex.Binop.op == Iop_DivU32 ||
1497 e->Iex.Binop.op == Iop_DivS32E ||
1498 e->Iex.Binop.op == Iop_DivU32E) {
1499 Bool syned = toBool((e->Iex.Binop.op == Iop_DivS32) || (e->Iex.Binop.op == Iop_DivS32E));
1501 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1502 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1504 PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivU32E )
1505 || ( e->Iex.Binop.op == Iop_DivS32E ) ) ? True
1514 if (e->Iex.Binop.op == Iop_DivS64 ||
1515 e->Iex.Binop.op == Iop_DivU64 || e->Iex.Binop.op == Iop_DivS64E
1516 || e->Iex.Binop.op == Iop_DivU64E ) {
1517 Bool syned = toBool((e->Iex.Binop.op == Iop_DivS64) ||(e->Iex.Binop.op == Iop_DivS64E));
1519 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1520 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1523 PPCInstr_Div( ( ( e->Iex.Binop.op == Iop_DivS64E )
1524 || ( e->Iex.Binop.op
1536 if (e->Iex.Binop.op == Iop_Mul32
1537 || e->Iex.Binop.op == Iop_Mul64) {
1539 Bool sz32 = (e->Iex.Binop.op != Iop_Mul64);
1541 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1542 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1550 && (e->Iex.Binop.op == Iop_MullU32
1551 || e->Iex.Binop.op == Iop_MullS32)) {
1555 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS32);
1556 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1557 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1572 if (e->Iex.Binop.op == Iop_CmpORD32S
1573 || e->Iex.Binop.op == Iop_CmpORD32U) {
1574 Bool syned = toBool(e->Iex.Binop.op == Iop_CmpORD32S);
1576 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1577 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1586 if (e->Iex.Binop.op == Iop_CmpORD64S
1587 || e->Iex.Binop.op == Iop_CmpORD64U) {
1588 Bool syned = toBool(e->Iex.Binop.op == Iop_CmpORD64S);
1590 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1591 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1601 if (e->Iex.Binop.op == Iop_Max32U) {
1602 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
1603 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
1613 if (e->Iex.Binop.op == Iop_32HLto64) {
1614 HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1615 HReg r_Lo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1631 if ((e->Iex.Binop.op == Iop_CmpF64) ||
1632 (e->Iex.Binop.op == Iop_CmpD64) ||
1633 (e->Iex.Binop.op == Iop_CmpD128)) {
1645 if (e->Iex.Binop.op == Iop_CmpF64) {
1646 fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1647 fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1650 } else if (e->Iex.Binop.op == Iop_CmpD64) {
1651 fr_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1);
1652 fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2);
1655 } else { // e->Iex.Binop.op == Iop_CmpD128
1656 iselDfp128Expr(&fr_srcL, &fr_srcL_lo, env, e->Iex.Binop.arg1);
1657 iselDfp128Expr(&fr_srcR, &fr_srcR_lo, env, e->Iex.Binop.arg2);
1709 if ( e->Iex.Binop.op == Iop_F64toI32S ||
1710 e->Iex.Binop.op == Iop_F64toI32U ) {
1714 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1719 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1723 e->Iex.Binop.op == Iop_F64toI32S ? True/*syned*/
1741 if (e->Iex.Binop.op == Iop_F64toI64S || e->Iex.Binop.op == Iop_F64toI64U ) {
1745 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1750 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1754 ( e->Iex.Binop.op == Iop_F64toI64S ) ? True
1767 if (e->Iex.Binop.op == Iop_D64toI64S ) {
1770 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
1775 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
1788 if (e->Iex.Binop.op == Iop_D128toI64S ) {
1796 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
1797 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
1812 IROp op_unop = e->Iex.Unop.op;
1848 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1857 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1871 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1884 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1897 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1912 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1919 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1923 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1933 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1937 return iselWordExpr_R(env, e->Iex.Unop.arg);
1942 return iselWordExpr_R(env, e->Iex.Unop.arg);
1949 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1959 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1966 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1975 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1985 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1999 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2017 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2030 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2038 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2048 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2060 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
2084 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
2111 return iselWordExpr_R(env, e->Iex.Unop.arg);
2119 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
2143 HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg);
2163 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
2196 iselWordExpr_R(env, e->Iex.Unop.arg) ) );
2225 iselWordExpr_R(env, e->Iex.Unop.arg) ) );
2241 switch (e->Iex.Unop.op) {
2245 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
2264 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
2286 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
2297 = genGuestArrayOffset( env, e->Iex.GetI.descr,
2298 e->Iex.GetI.ix, e->Iex.GetI.bias );
2315 vassert(ty == e->Iex.CCall.retty); /* well-formedness of IR */
2326 e->Iex.CCall.cee, e->Iex.CCall.retty, e->Iex.CCall.args );
2342 IRConst* con = e->Iex.Const.con;
2359 typeOfIRExpr(env->type_env,e->Iex.ITE.cond) == Ity_I1) {
2360 PPCRI* r1 = iselWordExpr_RI(env, e->Iex.ITE.iftrue);
2361 HReg r0 = iselWordExpr_R(env, e->Iex.ITE.iffalse);
2364 PPCCondCode cc = iselCondCode(env, e->Iex.ITE.cond);
2465 && e->Iex.Binop.op == Iop_Add64
2466 && e->Iex.Binop.arg2->tag == Iex_Const
2467 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U64
2468 && (aligned4imm ? uLong_is_4_aligned(e->Iex.Binop.arg2
2469 ->Iex.Const.con->Ico.U64)
2471 && uLong_fits_in_16_bits(e->Iex.Binop.arg2
2472 ->Iex.Const.con->Ico.U64)) {
2473 return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U64,
2474 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2479 && e->Iex.Binop.op == Iop_Add64) {
2480 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2481 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2491 && e->Iex.Binop.op == Iop_Add32
2492 && e->Iex.Binop.arg2->tag == Iex_Const
2493 && e->Iex.Binop.arg2->Iex.Const.con->tag == Ico_U32
2494 && uInt_fits_in_16_bits(e->Iex.Binop.arg2
2495 ->Iex.Const.con->Ico.U32)) {
2496 return PPCAMode_IR( (Int)e->Iex.Binop.arg2->Iex.Const.con->Ico.U32,
2497 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2502 && e->Iex.Binop.op == Iop_Add32) {
2503 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2504 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2555 IRConst* con = e->Iex.Const.con;
2614 IRConst* con = e->Iex.Const.con;
2665 && e->Iex.Const.con->tag == Ico_U8
2666 && e->Iex.Const.con->Ico.U8 >= 1
2667 && e->Iex.Const.con->Ico.U8 <= 31) {
2668 return PPCRH_Imm(False/*unsigned*/, e->Iex.Const.con->Ico.U8);
2710 && e->Iex.Const.con->tag == Ico_U8
2711 && e->Iex.Const.con->Ico.U8 >= 1
2712 && e->Iex.Const.con->Ico.U8 <= 63) {
2713 return PPCRH_Imm(False/*unsigned*/, e->Iex.Const.con->Ico.U8);
2740 if (e->tag == Iex_Const && e->Iex.Const.con->Ico.U1 == True) {
2750 if (e->tag == Iex_Unop && e->Iex.Unop.op == Iop_Not1) {
2752 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2761 (e->Iex.Unop.op == Iop_32to1 || e->Iex.Unop.op == Iop_64to1)) {
2762 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2778 && e->Iex.Unop.op == Iop_CmpNEZ8) {
2779 HReg arg = iselWordExpr_R(env, e->Iex.Unop.arg);
2792 && e->Iex.Unop.op == Iop_CmpNEZ32) {
2793 HReg r1 = iselWordExpr_R(env, e->Iex.Unop.arg);
2803 && (e->Iex.Binop.op == Iop_CmpEQ32
2804 || e->Iex.Binop.op == Iop_CmpNE32
2805 || e->Iex.Binop.op == Iop_CmpLT32S
2806 || e->Iex.Binop.op == Iop_CmpLT32U
2807 || e->Iex.Binop.op == Iop_CmpLE32S
2808 || e->Iex.Binop.op == Iop_CmpLE32U)) {
2809 Bool syned = (e->Iex.Binop.op == Iop_CmpLT32S ||
2810 e->Iex.Binop.op == Iop_CmpLE32S);
2811 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2812 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2816 switch (e->Iex.Binop.op) {
2831 && e->Iex.Unop.op == Iop_CmpNEZ64) {
2835 iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
2841 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2852 && (e->Iex.Binop.op == Iop_CmpEQ64
2853 || e->Iex.Binop.op == Iop_CmpNE64
2854 || e->Iex.Binop.op == Iop_CmpLT64S
2855 || e->Iex.Binop.op == Iop_CmpLT64U
2856 || e->Iex.Binop.op == Iop_CmpLE64S
2857 || e->Iex.Binop.op == Iop_CmpLE64U)) {
2858 Bool syned = (e->Iex.Binop.op == Iop_CmpLT64S ||
2859 e->Iex.Binop.op == Iop_CmpLE64S);
2860 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2861 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2866 switch (e->Iex.Binop.op) {
2881 && e->Iex.Binop.op == Iop_CmpNE8
2882 && isZeroU8(e->Iex.Binop.arg2)) {
2883 HReg arg = iselWordExpr_R(env, e->Iex.Binop.arg1);
2894 HReg r_src = lookupIRTemp(env, e->Iex.RdTmp.tmp);
2944 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
2950 switch (e->Iex.Binop.op) {
2956 Bool syned = toBool(e->Iex.Binop.op == Iop_MullS64);
2957 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2958 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2972 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2973 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2983 switch (e->Iex.Unop.op) {
3027 lookupIRTempQuad( rHi, rMedHi, rMedLo, rLo, env, e->Iex.RdTmp.tmp);
3033 IROp op_binop = e->Iex.Binop.op;
3036 iselInt64Expr(rHi, rMedHi, env, e->Iex.Binop.arg1);
3037 iselInt64Expr(rMedLo, rLo, env, e->Iex.Binop.arg2);
3078 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
3081 HReg r_addr = iselWordExpr_R(env, e->Iex.Load.addr);
3096 ULong w64 = e->Iex.Const.con->Ico.U64;
3101 vassert(e->Iex.Const.con->tag == Ico_U64);
3111 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
3117 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
3132 iselInt64Expr(&eXHi, &eXLo, env, e->Iex.ITE.iftrue);
3133 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.ITE.iffalse);
3138 PPCCondCode cc = iselCondCode(env, e->Iex.ITE.cond);
3148 IROp op_binop = e->Iex.Binop.op;
3156 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
3157 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
3178 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
3179 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
3192 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
3193 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
3205 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
3206 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
3216 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
3221 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3244 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
3248 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
3270 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
3271 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
3292 switch (e->Iex.Unop.op) {
3299 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
3318 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
3337 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
3346 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
3373 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
3391 HReg tLo = iselWordExpr_R(env, e->Iex.Unop.arg);
3407 env, e->Iex.Unop.arg);
3422 env, e->Iex.Unop.arg);
3432 Int off = e->Iex.Unop.op==Iop_V128HIto64 ? 0 : 8;
3435 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
3465 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
3481 iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
3494 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
3519 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
3564 iselInt64Expr( &tmpHi, &tmpLo, env, e->Iex.Unop.arg );
3604 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Unop.arg);
3664 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3667 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
3670 vassert(e->Iex.Load.ty == Ity_F32);
3671 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F32/*xfer*/);
3678 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
3684 if (e->tag == Iex_Unop && e->Iex.Unop.op == Iop_TruncF64asF32) {
3713 HReg fsrc = iselDblExpr(env, e->Iex.Unop.arg);
3728 if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) {
3731 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3736 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3759 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3762 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3835 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3846 if (e->Iex.Const.con->tag == Ico_F64) {
3847 u.f64 = e->Iex.Const.con->Ico.F64;
3849 else if (e->Iex.Const.con->tag == Ico_F64i) {
3850 u.u64 = e->Iex.Const.con->Ico.F64i;
3869 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
3872 vassert(e->Iex.Load.ty == Ity_F64);
3873 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F64/*xfer*/);
3881 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
3890 switch (e->Iex.Qop.details->op) {
3899 HReg r_srcML = iselDblExpr(env, e->Iex.Qop.details->arg2);
3900 HReg r_srcMR = iselDblExpr(env, e->Iex.Qop.details->arg3);
3901 HReg r_srcAcc = iselDblExpr(env, e->Iex.Qop.details->arg4);
3902 set_FPU_rounding_mode( env, e->Iex.Qop.details->arg1 );
3910 IRTriop *triop = e->Iex.Triop.details;
3935 switch (e->Iex.Binop.op) {
3941 HReg fr_src = iselDblExpr(env, e->Iex.Binop.arg2);
3942 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3950 if (e->Iex.Binop.op == Iop_RoundF64toF32) {
3952 HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2);
3953 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3959 if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64) {
3962 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3967 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3974 e->Iex.Binop.op == Iop_I64StoF64,
3991 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3994 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
4002 e->Iex.Binop.op == Iop_I64StoF64,
4018 switch (e->Iex.Unop.op) {
4030 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
4037 switch (e->Iex.Unop.op) {
4043 iselInt64Expr( &r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
4046 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
4052 if (e->Iex.Unop.arg->tag == Iex_Unop &&
4053 e->Iex.Unop.arg->Iex.Unop.op == Iop_ReinterpI32asF32 ) {
4054 e = e->Iex.Unop.arg;
4056 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
4076 HReg res = iselFltExpr(env, e->Iex.Unop.arg);
4087 && typeOfIRExpr(env->type_env,e->Iex.ITE.cond) == Ity_I1) {
4088 HReg fr1 = iselDblExpr(env, e->Iex.ITE.iftrue);
4089 HReg fr0 = iselDblExpr(env, e->Iex.ITE.iffalse);
4092 PPCCondCode cc = iselCondCode(env, e->Iex.ITE.cond);
4123 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
4130 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
4133 vassert(e->Iex.Load.ty == Ity_D32);
4134 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_D32/*xfer*/);
4141 if (e->Iex.Binop.op == Iop_D64toD32) {
4143 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
4144 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
4173 return lookupIRTemp( env, e->Iex.RdTmp.tmp );
4179 PPCAMode* am_addr = PPCAMode_IR( e->Iex.Get.offset,
4185 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
4188 vassert(e->Iex.Load.ty == Ity_D64);
4189 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_D64/*xfer*/);
4202 switch (e->Iex.Unop.op) {
4208 iselInt64Expr( &r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
4211 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
4216 HReg fr_src = iselDfp32Expr(env, e->Iex.Unop.arg);
4221 iselDfp128Expr( &r_dstHi, &r_dstLo, env, e->Iex.Unop.arg );
4224 iselDfp128Expr( &r_dstHi, &r_dstLo, env, e->Iex.Unop.arg );
4227 HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
4228 HReg fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
4236 e->Iex.Unop.op );
4244 switch (e->Iex.Binop.op) {
4255 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
4256 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4262 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
4269 fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
4274 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
4275 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
4283 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
4288 HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg2);
4295 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Binop.arg2);
4306 switch (e->Iex.Binop.op) {
4313 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg1);
4314 PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2);
4323 switch (e->Iex.Binop.op) {
4331 HReg fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2);
4337 HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1);
4346 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Binop.arg1);
4359 IRTriop *triop = e->Iex.Triop.details;
4445 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp );
4453 if (e->Iex.Unop.op == Iop_I64StoD128) {
4459 HReg tmp = iselWordExpr_R(env, e->Iex.Unop.arg);
4465 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Unop.arg);
4475 if (e->Iex.Unop.op == Iop_D64toD128) {
4476 HReg r_src = iselDfp64Expr(env, e->Iex.Unop.arg);
4495 switch (e->Iex
4497 r_srcHi = iselDfp64Expr( env, e->Iex.Binop.arg1 );
4498 r_srcLo = iselDfp64Expr( env, e->Iex.Binop.arg2 );
4507 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
4508 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4522 PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2);
4525 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg1);
4527 if (e->Iex.Binop.op == Iop_ShrD128)
4540 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
4543 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4559 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4563 HReg tmp = iselWordExpr_R(env, e->Iex.Binop.arg1);
4569 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Unop.arg);
4584 e->Iex.Binop.op );
4590 IRTriop *triop = e->Iex.Triop.details;
4721 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
4730 PPCAMode_IR( e->Iex.Get.offset,
4735 if (e->tag == Iex_Load && e->Iex.Load.end == Iend_BE) {
4738 vassert(e->Iex.Load.ty == Ity_V128);
4739 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_V128/*xfer*/);
4745 switch (e->Iex.Unop.op) {
4748 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4755 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4765 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4775 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4785 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4806 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4814 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
4846 return mk_AvDuplicateRI(env, e->Iex.Unop.arg);
4850 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4863 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4871 } /* switch (e->Iex.Unop.op) */
4875 switch (e->Iex.Binop.op) {
4893 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
4897 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
4907 HReg rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
4908 HReg rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
4939 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
4940 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
4947 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
4948 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
4972 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
4973 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5004 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5005 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5039 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5040 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5077 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5078 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5104 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5105 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5114 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
5116 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
5125 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
5127 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
5136 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
5138 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
5147 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
5149 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
5158 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
5159 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
5167 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1);
5168 HReg v_ctl = iselVecExpr(env, e->Iex.Binop.arg2);
5178 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5179 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
5188 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
5190 PPCRI* s_field = iselWordExpr_RI(env, e->Iex.Binop.arg2);
5196 } /* switch (e->Iex.Binop.op) */
5200 IRTriop *triop = e->Iex.Triop.details;
5234 } /* switch (e->Iex.Triop.op) */
5239 vassert(e->Iex.Const.con->tag == Ico_V128);
5240 if (e->Iex.Const.con->Ico.V128 == 0x0000) {
5243 else if (e->Iex.Const.con->Ico.V128 == 0xffff) {
5807 IRConst* cdst = next->Iex.Const.con;
