Lines Matching refs:v_src
1284 HReg v_src = newVRegV(env);
1296 addInstr(env, PPCInstr_AvLdSt( True/*ld*/, 4, v_src, am_off12 ) );
1299 /* Finally, splat v_src[low_lane] to dst */
1300 addInstr(env, PPCInstr_AvSplat(sz, dst, PPCVI5s_Reg(v_src)));
5167 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1);
5169 addInstr(env, PPCInstr_AvPerm(dst, v_src, v_src, v_ctl));
5328 HReg v_src = iselVecExpr(env, stmt->Ist.Store.data);
5330 PPCInstr_AvLdSt(False/*store*/, 16, v_src, am_addr));
5378 HReg v_src = iselVecExpr(env, stmt->Ist.Put.data);
5382 PPCInstr_AvLdSt(False/*store*/, 16, v_src, am_addr));
5507 HReg v_src = iselVecExpr(env, stmt->Ist.WrTmp.data);
5508 addInstr(env, PPCInstr_AvUnary(Pav_MOV, v_dst, v_src));
