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Lines Matching refs:vec0

3394          HReg vec0 = newVRegV(env);
3401          addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec0, vec0));
3402          addInstr(env, mk_vMOVsd_RR(vec0, vec1));
3407          /* vec0 is all 0s; vec1 is all 1s */
3410          addInstr(env, X86Instr_SseReRg(cmpOp, vec0, dst));