Lines Matching refs:V128
303 UShort V128; /* 16-bit value; see Ico_V128 comment above */
499 Iop_DivModU128to64, // :: V128,I64 -> V128
1247 /* BCD arithmetic instructions, (V128, V128) -> V128
1263 /* ternary :: IRRoundingMode(I32) x V128 x V128 -> V128 */
1335 /* ternary :: IRRoundingMode(I32) x V128 x V128 -> V128 */
1366 Iop_V128to64, // :: V128 -> I64, low half
1367 Iop_V128HIto64, // :: V128 -> I64, high half
1368 Iop_64HLtoV128, // :: (I64,I64) -> V128
1374 Iop_ZeroHI64ofV128, // :: V128 -> V128
1375 Iop_ZeroHI96ofV128, // :: V128 -> V128
1376 Iop_ZeroHI112ofV128, // :: V128 -> V128
1377 Iop_ZeroHI120ofV128, // :: V128 -> V128
1381 Iop_V128to32, // :: V128 -> I32, lowest lane
1382 Iop_SetV128lo32, // :: (V128,I32) -> V128
1425 /* Doubling saturating multiplication (long) (I64, I64) -> V128 */
1429 Iop_PolynomialMul8x16, /* (V128, V128) -> V128 */
1430 Iop_PolynomialMull8x8, /* (I64, I64) -> V128 */
1432 /* Vector Polynomial multiplication add. (V128, V128) -> V128
1480 /* Vector bit matrix transpose. (V128) -> V128 */
1543 /* NARROWING (unary) -- narrow V128 into I64 */
1556 All operations are I64->V128.
1583 GET is binop (V128, I8) -> I<elem_size> */
1593 It is a triop: (V128, V128, I8) -> V128 */
1616 Iop_GetMSBs8x16, /* V128 -> I16 */
1633 Iop_V256toV128_0, // V256 -> V128, less significant lane
1634 Iop_V256toV128_1, // V256 -> V128, more significant lane
1635 Iop_V128HLtoV256, // (V128,V128)->V256, first arg is most signif
1672 /* (V128, V128) -> V128 */
1678 /* (V128, I8) -> V128; The I8 input arg is (ST | SIX), where ST and
1941 be able to return V128 or V256 values. Hence this is not allowed.
1990 (naturally aligned) V128 or V256, into which the helper is expected
1992 controlled. If the helper returns a V128 or V256 value then
