Lines Matching refs:hwcaps
453 /* For hwcaps detection on ppc32/64, s390x, and arm we'll need to do SIGILL
778 vai.hwcaps = VEX_HWCAPS_X86_MMXEXT;
779 vai.hwcaps |= VEX_HWCAPS_X86_SSE1;
780 vai.hwcaps |= VEX_HWCAPS_X86_SSE2;
782 vai.hwcaps |= VEX_HWCAPS_X86_LZCNT;
785 vai.hwcaps = VEX_HWCAPS_X86_MMXEXT;
786 vai.hwcaps |= VEX_HWCAPS_X86_SSE1;
789 vai.hwcaps = VEX_HWCAPS_X86_MMXEXT; /*integer only sse1 subset*/
792 vai.hwcaps = 0; /*baseline - no sse at all*/
895 vai.hwcaps = (have_sse3 ? VEX_HWCAPS_AMD64_SSE3 : 0)
1051 vai.hwcaps = 0;
1052 if (have_F) vai.hwcaps |= VEX_HWCAPS_PPC32_F;
1053 if (have_V) vai.hwcaps |= VEX_HWCAPS_PPC32_V;
1054 if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC32_FX;
1055 if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC32_GX;
1056 if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC32_VX;
1057 if (have_DFP) vai.hwcaps |= VEX_HWCAPS_PPC32_DFP;
1058 if (have_isa_2_07) vai.hwcaps |= VEX_HWCAPS_PPC32_ISA2_07;
1189 vai.hwcaps = 0;
1190 if (have_V) vai.hwcaps |= VEX_HWCAPS_PPC64_V;
1191 if (have_FX) vai.hwcaps |= VEX_HWCAPS_PPC64_FX;
1192 if (have_GX) vai.hwcaps |= VEX_HWCAPS_PPC64_GX;
1193 if (have_VX) vai.hwcaps |= VEX_HWCAPS_PPC64_VX;
1194 if (have_DFP) vai.hwcaps |= VEX_HWCAPS_PPC64_DFP;
1195 if (have_isa_2_07) vai.hwcaps |= VEX_HWCAPS_PPC64_ISA2_07;
1242 /* Determine hwcaps. Note, we cannot use the stfle insn because it
1281 vai.hwcaps = model;
1282 if (have_STFLE) vai.hwcaps |= VEX_HWCAPS_S390X_STFLE;
1287 vai.hwcaps |= VEX_HWCAPS_S390X_LDISP;
1312 /* Set hwcaps according to the detected facilities */
1317 vai.hwcaps |= fac_hwcaps[i].hwcaps_bit;
1335 VG_(debugLog)(1, "machine", "hwcaps = 0x%x\n", vai.hwcaps);
1442 vai.hwcaps = VEX_ARM_ARCHLEVEL(archlevel);
1443 if (have_VFP3) vai.hwcaps |= VEX_HWCAPS_ARM_VFP3;
1444 if (have_VFP2) vai.hwcaps |= VEX_HWCAPS_ARM_VFP2;
1445 if (have_VFP) vai.hwcaps |= VEX_HWCAPS_ARM_VFP;
1446 if (have_NEON) vai.hwcaps |= VEX_HWCAPS_ARM_NEON;
1458 vai.hwcaps = 0;
1487 vai.hwcaps = model;
1528 vai.hwcaps |= VEX_PRID_IMP_74K;
1539 vai.hwcaps |= VEX_PRID_IMP_34K;
1551 vai.hwcaps |= VEX_PRID_CPU_32FPR;
1558 VG_(debugLog)(1, "machine", "hwcaps = 0x%x\n", vai.hwcaps);
1571 vai.hwcaps = model;
1627 vai.hwcaps |= VEX_HWCAPS_ARM_NEON;
1629 vai.hwcaps &= ~VEX_HWCAPS_ARM_NEON;
1675 return (vai.hwcaps & VEX_HWCAPS_AMD64_AVX) ? 32 : 16;
1679 if (vai.hwcaps & VEX_HWCAPS_PPC32_V) return 16;
1680 if (vai.hwcaps & VEX_HWCAPS_PPC32_VX) return 16;
1681 if (vai.hwcaps & VEX_HWCAPS_PPC32_DFP) return 16;
1686 if (vai.hwcaps & VEX_HWCAPS_PPC64_V) return 16;
1687 if (vai.hwcaps & VEX_HWCAPS_PPC64_VX) return 16;
1688 if (vai.hwcaps & VEX_HWCAPS_PPC64_DFP) return 16;
