Lines Matching defs:round
409 "0b00 (Round to Nearest)",
410 "0b01 (Round towards Plus Infinity)",
411 "0b10 (Round towards Minus Infinity)",
412 "0b11 (Round towards Zero)"
1356 FPRounding round = RMode();
1414 case SCVTF_dx: set_dreg(dst, FixedToDouble(xreg(src), 0, round)); break;
1415 case SCVTF_dw: set_dreg(dst, FixedToDouble(wreg(src), 0, round)); break;
1416 case UCVTF_dx: set_dreg(dst, UFixedToDouble(xreg(src), 0, round)); break;
1418 set_dreg(dst, UFixedToDouble(static_cast<uint32_t>(wreg(src)), 0, round));
1421 case SCVTF_sx: set_sreg(dst, FixedToFloat(xreg(src), 0, round)); break;
1422 case SCVTF_sw: set_sreg(dst, FixedToFloat(wreg(src), 0, round)); break;
1423 case UCVTF_sx: set_sreg(dst, UFixedToFloat(xreg(src), 0, round)); break;
1425 set_sreg(dst, UFixedToFloat(static_cast<uint32_t>(wreg(src)), 0, round));
1441 FPRounding round = RMode();
1447 set_dreg(dst, FixedToDouble(xreg(src), fbits, round));
1450 set_dreg(dst, FixedToDouble(wreg(src), fbits, round));
1453 set_dreg(dst, UFixedToDouble(xreg(src), fbits, round));
1457 UFixedToDouble(static_cast<uint32_t>(wreg(src)), fbits, round));
1461 set_sreg(dst, FixedToFloat(xreg(src), fbits, round));
1464 set_sreg(dst, FixedToFloat(wreg(src), fbits, round));
1467 set_sreg(dst, UFixedToFloat(xreg(src), fbits, round));
1471 UFixedToFloat(static_cast<uint32_t>(wreg(src)), fbits, round));
1802 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) {
1804 return UFixedToDouble(src, fbits, round);
1807 return -UFixedToDouble(-src, fbits, round);
1812 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) {
1824 return FPRoundToDouble(0, exponent, src, round);
1828 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) {
1830 return UFixedToFloat(src, fbits, round);
1833 return -UFixedToFloat(-src, fbits, round);
1838 float Simulator::UFixedToFloat(uint64_t src, int fbits, FPRounding round) {
1850 return FPRoundToFloat(0, exponent, src, round);
1873 // result is positive, round up.
1885 // result is odd, round up.
