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Searched
defs:HiVT
(Results
1 - 7
of
7
) sorted by null
/external/llvm/lib/CodeGen/SelectionDAG/
LegalizeTypesGeneric.cpp
85
EVT LoVT,
HiVT
;
86
std::tie(LoVT,
HiVT
) = DAG.GetSplitDestVTs(InVT);
87
std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT,
HiVT
);
549
EVT LoVT,
HiVT
;
550
std::tie(LoVT,
HiVT
) = DAG.GetSplitDestVTs(N->getValueType(0));
552
Hi = DAG.getUNDEF(
HiVT
);
LegalizeIntegerTypes.cpp
[
all
...]
LegalizeVectorTypes.cpp
687
EVT LoVT,
HiVT
;
688
std::tie(LoVT,
HiVT
) = DAG.GetSplitDestVTs(N->getValueType(0));
707
if (LoVT ==
HiVT
) {
712
Hi = DAG.getNode(ISD::BITCAST, dl,
HiVT
, Hi);
721
Hi = DAG.getNode(ISD::BITCAST, dl,
HiVT
, Hi);
727
EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(),
HiVT
.getSizeInBits());
736
Hi = DAG.getNode(ISD::BITCAST, dl,
HiVT
, Hi);
741
EVT LoVT,
HiVT
;
743
std::tie(LoVT,
HiVT
) = DAG.GetSplitDestVTs(N->getValueType(0));
749
Hi = DAG.getNode(ISD::BUILD_VECTOR, dl,
HiVT
, HiOps)
[
all
...]
SelectionDAG.cpp
[
all
...]
DAGCombiner.cpp
[
all
...]
/external/llvm/include/llvm/CodeGen/
SelectionDAG.h
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp
[
all
...]
Completed in 620 milliseconds