1 /* 2 * Copyright 2007 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric (at) anholt.net> 25 * 26 */ 27 28 #ifdef HAVE_CONFIG_H 29 #include "config.h" 30 #endif 31 32 #include <string.h> 33 #include <stdlib.h> 34 #include <stdint.h> 35 #include <assert.h> 36 #include <errno.h> 37 #include <drm.h> 38 #include <i915_drm.h> 39 #include "intel_bufmgr.h" 40 #include "intel_bufmgr_priv.h" 41 42 /** @file intel_bufmgr.c 43 * 44 * Convenience functions for buffer management methods. 45 */ 46 47 drm_intel_bo * 48 drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, 49 unsigned long size, unsigned int alignment) 50 { 51 return bufmgr->bo_alloc(bufmgr, name, size, alignment); 52 } 53 54 drm_intel_bo * 55 drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, const char *name, 56 unsigned long size, unsigned int alignment) 57 { 58 return bufmgr->bo_alloc_for_render(bufmgr, name, size, alignment); 59 } 60 61 void 62 drm_intel_bo_reference(drm_intel_bo *bo) 63 { 64 bo->bufmgr->bo_reference(bo); 65 } 66 67 void 68 drm_intel_bo_unreference(drm_intel_bo *bo) 69 { 70 if (bo == NULL) 71 return; 72 73 bo->bufmgr->bo_unreference(bo); 74 } 75 76 int 77 drm_intel_bo_map(drm_intel_bo *buf, int write_enable) 78 { 79 return buf->bufmgr->bo_map(buf, write_enable); 80 } 81 82 int 83 drm_intel_bo_unmap(drm_intel_bo *buf) 84 { 85 return buf->bufmgr->bo_unmap(buf); 86 } 87 88 int 89 drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset, 90 unsigned long size, const void *data) 91 { 92 int ret; 93 94 if (bo->bufmgr->bo_subdata) 95 return bo->bufmgr->bo_subdata(bo, offset, size, data); 96 if (size == 0 || data == NULL) 97 return 0; 98 99 ret = drm_intel_bo_map(bo, 1); 100 if (ret) 101 return ret; 102 memcpy((unsigned char *)bo->virtual + offset, data, size); 103 drm_intel_bo_unmap(bo); 104 return 0; 105 } 106 107 int 108 drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, 109 unsigned long size, void *data) 110 { 111 int ret; 112 if (bo->bufmgr->bo_subdata) 113 return bo->bufmgr->bo_get_subdata(bo, offset, size, data); 114 115 if (size == 0 || data == NULL) 116 return 0; 117 118 ret = drm_intel_bo_map(bo, 0); 119 if (ret) 120 return ret; 121 memcpy(data, (unsigned char *)bo->virtual + offset, size); 122 drm_intel_bo_unmap(bo); 123 return 0; 124 } 125 126 void 127 drm_intel_bo_wait_rendering(drm_intel_bo *bo) 128 { 129 bo->bufmgr->bo_wait_rendering(bo); 130 } 131 132 void 133 drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr) 134 { 135 bufmgr->destroy(bufmgr); 136 } 137 138 int 139 drm_intel_bo_exec(drm_intel_bo *bo, int used, 140 drm_clip_rect_t *cliprects, int num_cliprects, 141 int DR4) 142 { 143 return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4); 144 } 145 146 void 147 drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug) 148 { 149 bufmgr->debug = enable_debug; 150 } 151 152 int 153 drm_intel_bufmgr_check_aperture_space(drm_intel_bo **bo_array, int count) 154 { 155 return bo_array[0]->bufmgr->check_aperture_space(bo_array, count); 156 } 157 158 int 159 drm_intel_bo_flink(drm_intel_bo *bo, uint32_t *name) 160 { 161 if (bo->bufmgr->bo_flink) 162 return bo->bufmgr->bo_flink(bo, name); 163 164 return -ENODEV; 165 } 166 167 int 168 drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, 169 drm_intel_bo *target_bo, uint32_t target_offset, 170 uint32_t read_domains, uint32_t write_domain) 171 { 172 return bo->bufmgr->bo_emit_reloc(bo, offset, 173 target_bo, target_offset, 174 read_domains, write_domain); 175 } 176 177 int 178 drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment) 179 { 180 if (bo->bufmgr->bo_pin) 181 return bo->bufmgr->bo_pin(bo, alignment); 182 183 return -ENODEV; 184 } 185 186 int 187 drm_intel_bo_unpin(drm_intel_bo *bo) 188 { 189 if (bo->bufmgr->bo_unpin) 190 return bo->bufmgr->bo_unpin(bo); 191 192 return -ENODEV; 193 } 194 195 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t *tiling_mode, 196 uint32_t stride) 197 { 198 if (bo->bufmgr->bo_set_tiling) 199 return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride); 200 201 *tiling_mode = I915_TILING_NONE; 202 return 0; 203 } 204 205 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t *tiling_mode, 206 uint32_t *swizzle_mode) 207 { 208 if (bo->bufmgr->bo_get_tiling) 209 return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode); 210 211 *tiling_mode = I915_TILING_NONE; 212 *swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 213 return 0; 214 } 215 216 int drm_intel_bo_disable_reuse(drm_intel_bo *bo) 217 { 218 if (bo->bufmgr->bo_disable_reuse) 219 return bo->bufmgr->bo_disable_reuse(bo); 220 return 0; 221 } 222 223 int drm_intel_bo_busy(drm_intel_bo *bo) 224 { 225 if (bo->bufmgr->bo_busy) 226 return bo->bufmgr->bo_busy(bo); 227 return 0; 228 } 229 230 int 231 drm_intel_get_pipe_from_crtc_id (drm_intel_bufmgr *bufmgr, int crtc_id) 232 { 233 if (bufmgr->get_pipe_from_crtc_id) 234 return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id); 235 return -1; 236 } 237 238
