1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the MIPS16 implementation of the TargetRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "Mips16RegisterInfo.h" 15 #include "Mips.h" 16 #include "Mips16InstrInfo.h" 17 #include "MipsAnalyzeImmediate.h" 18 #include "MipsInstrInfo.h" 19 #include "MipsMachineFunction.h" 20 #include "MipsSubtarget.h" 21 #include "llvm/ADT/BitVector.h" 22 #include "llvm/ADT/STLExtras.h" 23 #include "llvm/CodeGen/MachineFrameInfo.h" 24 #include "llvm/CodeGen/MachineFunction.h" 25 #include "llvm/CodeGen/MachineInstrBuilder.h" 26 #include "llvm/CodeGen/MachineRegisterInfo.h" 27 #include "llvm/IR/Constants.h" 28 #include "llvm/IR/DebugInfo.h" 29 #include "llvm/IR/Function.h" 30 #include "llvm/IR/Type.h" 31 #include "llvm/Support/CommandLine.h" 32 #include "llvm/Support/Debug.h" 33 #include "llvm/Support/ErrorHandling.h" 34 #include "llvm/Support/raw_ostream.h" 35 #include "llvm/Target/TargetFrameLowering.h" 36 #include "llvm/Target/TargetInstrInfo.h" 37 #include "llvm/Target/TargetMachine.h" 38 #include "llvm/Target/TargetOptions.h" 39 40 using namespace llvm; 41 42 #define DEBUG_TYPE "mips16-registerinfo" 43 44 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST) 45 : MipsRegisterInfo(ST) {} 46 47 bool Mips16RegisterInfo::requiresRegisterScavenging 48 (const MachineFunction &MF) const { 49 return false; 50 } 51 bool Mips16RegisterInfo::requiresFrameIndexScavenging 52 (const MachineFunction &MF) const { 53 return false; 54 } 55 56 bool Mips16RegisterInfo::useFPForScavengingIndex 57 (const MachineFunction &MF) const { 58 return false; 59 } 60 61 bool Mips16RegisterInfo::saveScavengerRegister 62 (MachineBasicBlock &MBB, 63 MachineBasicBlock::iterator I, 64 MachineBasicBlock::iterator &UseMI, 65 const TargetRegisterClass *RC, 66 unsigned Reg) const { 67 DebugLoc DL; 68 const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo(); 69 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true); 70 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true); 71 return true; 72 } 73 74 const TargetRegisterClass * 75 Mips16RegisterInfo::intRegClass(unsigned Size) const { 76 assert(Size == 4); 77 return &Mips::CPU16RegsRegClass; 78 } 79 80 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II, 81 unsigned OpNo, int FrameIndex, 82 uint64_t StackSize, 83 int64_t SPOffset) const { 84 MachineInstr &MI = *II; 85 MachineFunction &MF = *MI.getParent()->getParent(); 86 MachineFrameInfo *MFI = MF.getFrameInfo(); 87 88 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 89 int MinCSFI = 0; 90 int MaxCSFI = -1; 91 92 if (CSI.size()) { 93 MinCSFI = CSI[0].getFrameIdx(); 94 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx(); 95 } 96 97 // The following stack frame objects are always 98 // referenced relative to $sp: 99 // 1. Outgoing arguments. 100 // 2. Pointer to dynamically allocated stack space. 101 // 3. Locations for callee-saved registers. 102 // Everything else is referenced relative to whatever register 103 // getFrameRegister() returns. 104 unsigned FrameReg; 105 106 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) 107 FrameReg = Mips::SP; 108 else { 109 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 110 if (TFI->hasFP(MF)) { 111 FrameReg = Mips::S0; 112 } 113 else { 114 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg()) 115 FrameReg = MI.getOperand(OpNo+2).getReg(); 116 else 117 FrameReg = Mips::SP; 118 } 119 } 120 // Calculate final offset. 121 // - There is no need to change the offset if the frame object 122 // is one of the 123 // following: an outgoing argument, pointer to a dynamically allocated 124 // stack space or a $gp restore location, 125 // - If the frame object is any of the following, 126 // its offset must be adjusted 127 // by adding the size of the stack: 128 // incoming argument, callee-saved register location or local variable. 129 int64_t Offset; 130 bool IsKill = false; 131 Offset = SPOffset + (int64_t)StackSize; 132 Offset += MI.getOperand(OpNo + 1).getImm(); 133 134 135 DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n"); 136 137 if (!MI.isDebugValue() && 138 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) { 139 MachineBasicBlock &MBB = *MI.getParent(); 140 DebugLoc DL = II->getDebugLoc(); 141 unsigned NewImm; 142 const Mips16InstrInfo &TII = 143 *static_cast<const Mips16InstrInfo*>( 144 MBB.getParent()->getTarget().getInstrInfo()); 145 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm); 146 Offset = SignExtend64<16>(NewImm); 147 IsKill = true; 148 } 149 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill); 150 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset); 151 152 153 } 154
