/external/valgrind/main/none/tests/mips64/ |
logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, 27 case ANDI: 30 TEST2("andi $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); 31 TEST2("andi $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); 32 TEST2("andi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); 33 TEST2("andi $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); 34 TEST2("andi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); 35 TEST2("andi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); 36 TEST2("andi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); 37 TEST2("andi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1) [all...] |
/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 298 case ANDI:
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constants-mips.h | 278 ANDI = ((1 << 3) + 4) << kOpcodeShift,
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assembler-mips.cc | 629 return GetOpcodeField(instr) == ANDI; 1238 void Assembler::andi(Register rt, Register rs, int32_t j) { function in class:v8::Assembler [all...] |
simulator-mips.cc | [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.h | 305 void ANDI(int Rd, int Rs, uint16_t imm);
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MIPSAssembler.cpp | 437 mMips->ANDI(Rd, Rn, src); [all...] |