| /external/chromium_org/base/ |
| cpu.h | 28 AVX,
49 // has_avx_hardware returns true when AVX is present in the CPU. This might
51 // operating system support needed to actually call AVX instuctions.
|
| cpu.cc | 181 // AVX instructions will generate an illegal instruction exception unless
185 // See http://software.intel.com/en-us/blogs/2011/04/14/is-avx-enabled
227 if (has_avx()) return AVX;
|
| /external/lldb/tools/debugserver/source/MacOSX/i386/ |
| DNBArchImplI386.h | 67 typedef __i386_avx_state_t AVX;
99 e_regSetWordSizeAVX = sizeof(AVX) / sizeof(int),
115 AVX avx; member in union:DNBArchImplI386::Context::__anon29178
|
| DNBArchImplI386.cpp | 355 m_state.context.fpu.avx.__fpu_reserved[0] = -1;
356 m_state.context.fpu.avx.__fpu_reserved[1] = -1;
357 *(uint16_t *)&(m_state.context.fpu.avx.__fpu_fcw) = 0x1234;
358 *(uint16_t *)&(m_state.context.fpu.avx.__fpu_fsw) = 0x5678;
359 m_state.context.fpu.avx.__fpu_ftw = 1;
360 m_state.context.fpu.avx.__fpu_rsrv1 = UINT8_MAX;
361 m_state.context.fpu.avx.__fpu_fop = 2;
362 m_state.context.fpu.avx.__fpu_ip = 3;
363 m_state.context.fpu.avx.__fpu_cs = 4;
364 m_state.context.fpu.avx.__fpu_rsrv2 = 5
[all...] |
| /external/lldb/tools/debugserver/source/MacOSX/x86_64/ |
| DNBArchImplX86_64.h | 66 typedef __x86_64_avx_state_t AVX;
98 e_regSetWordSizeAVX = sizeof(AVX) / sizeof(int),
114 AVX avx; member in union:DNBArchImplX86_64::Context::__anon29196
|
| DNBArchImplX86_64.cpp | 86 // Only xnu-2020 or later has AVX support, any versions before
89 // verify the kernel version number manually or disable AVX support.
264 m_state.context.fpu.avx.__fpu_reserved[0] = -1;
265 m_state.context.fpu.avx.__fpu_reserved[1] = -1;
266 *(uint16_t *)&(m_state.context.fpu.avx.__fpu_fcw) = 0x1234;
267 *(uint16_t *)&(m_state.context.fpu.avx.__fpu_fsw) = 0x5678;
268 m_state.context.fpu.avx.__fpu_ftw = 1;
269 m_state.context.fpu.avx.__fpu_rsrv1 = UINT8_MAX;
270 m_state.context.fpu.avx.__fpu_fop = 2;
271 m_state.context.fpu.avx.__fpu_ip = 3
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86Subtarget.h | 51 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
193 /// Processor has AVX-512 PreFetch Instructions
196 /// Processor has AVX-512 Exponential and Reciprocal Instructions
199 /// Processor has AVX-512 Conflict Detection Instructions
311 bool hasAVX() const { return X86SSELevel >= AVX; }
|
| /external/chromium_org/third_party/libyuv/source/ |
| x86inc.asm | 605 %if cpuflag(AVX)
824 ; AVX abstraction layer
843 %error non-AVX emulation of ``%%opcode'' is not supported
897 ; 3arg AVX ops with a memory arg can only have it in src2,
1096 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
|
| /external/clang/lib/Basic/ |
| Targets.cpp | [all...] |
| /external/chromium_org/third_party/x86inc/ |
| x86inc.asm | 736 ; AVX abstraction layer
949 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
|
| /external/chromium_org/third_party/libvpx/source/libvpx/third_party/x86inc/ |
| x86inc.asm | 690 %if cpuflag(avx)
764 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
917 ; AVX abstraction layer
976 ; 3arg AVX ops with a memory arg can only have it in src2,
1167 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
|
| /external/libvpx/libvpx/third_party/x86inc/ |
| x86inc.asm | 686 %if cpuflag(avx)
760 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
913 ; AVX abstraction layer
972 ; 3arg AVX ops with a memory arg can only have it in src2,
1163 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/third_party/x86inc/ |
| x86inc.asm | 686 %if cpuflag(avx)
760 ; FIXME: INIT_AVX can be replaced by INIT_XMM avx
913 ; AVX abstraction layer
972 ; 3arg AVX ops with a memory arg can only have it in src2,
1163 ; 3DNow instructions, for sharing code between AVX, SSE and 3DN
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| avx.asm | 1 ; Exhaustive test of AVX instructions
314 ; These require memory operand size to be specified (in AVX version)
424 ; These require memory operand size to be specified (in AVX version)
[all...] |
| avxcc.asm | 1 ; Exhaustive test of AVX condition code aliases
|
