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Searched
refs:FirstMI
(Results
1 - 3
of
3
) sorted by null
/external/llvm/lib/CodeGen/
MachineInstrBundle.cpp
95
/// a sequence of instructions starting from
FirstMI
to LastMI (exclusive).
101
MachineBasicBlock::instr_iterator
FirstMI
,
103
assert(
FirstMI
!= LastMI && "Empty bundle?");
104
MIBundleBuilder Bundle(MBB,
FirstMI
, LastMI);
110
MachineInstrBuilder MIB = BuildMI(*MBB.getParent(),
FirstMI
->getDebugLoc(),
123
for (;
FirstMI
!= LastMI; ++
FirstMI
) {
124
for (unsigned i = 0, e =
FirstMI
->getNumOperands(); i != e; ++i) {
125
MachineOperand &MO =
FirstMI
->getOperand(i);
212
MachineBasicBlock::instr_iterator
FirstMI
) {
[
all
...]
/external/llvm/include/llvm/CodeGen/
MachineInstrBundle.h
23
/// a sequence of instructions starting from
FirstMI
to LastMI (exclusive).
29
MachineBasicBlock::instr_iterator
FirstMI
,
38
MachineBasicBlock::instr_iterator
FirstMI
);
/external/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp
389
MachineInstr *
FirstMI
= I;
392
int Opc =
FirstMI
->getOpcode();
393
bool MayLoad =
FirstMI
->mayLoad();
395
unsigned Reg =
FirstMI
->getOperand(0).getReg();
396
unsigned BaseReg =
FirstMI
->getOperand(1).getReg();
397
int Offset =
FirstMI
->getOperand(2).getImm();
404
if (
FirstMI
->modifiesRegister(BaseReg, TRI))
407
IsUnscaled && EnableAArch64UnscaledMemOp ? getMemSize(
FirstMI
) : 1;
481
if (!ModifiedRegs[
FirstMI
->getOperand(0).getReg()] &&
482
!UsedRegs[
FirstMI
->getOperand(0).getReg()])
[
all
...]
Completed in 610 milliseconds