/art/compiler/dex/quick/mips/ |
int_mips.cc | 55 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); 56 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); 197 NewLIR2(kMipsMtc1, r_src.GetLowReg(), r_dest.GetLowReg()); 202 NewLIR2(kMipsMfc1, r_dest.GetLowReg(), r_src.GetLowReg()); 206 if (r_src.GetHighReg() == r_dest.GetLowReg()) { 411 NewLIR3(kMipsSltu, rl_result.reg.GetHighReg(), rl_result.reg.GetLowReg(), rl_src2.reg.GetLowReg()) [all...] |
utility_mips.cc | 481 DCHECK_EQ(r_dest.GetLowReg(), r_dest.GetHighReg() - 1); 521 load = res = NewLIR3(opcode, r_dest.GetLowReg(), displacement + LOWORD_OFFSET, r_base.GetReg()); 528 load = NewLIR3(opcode, r_dest.GetLowReg(), LOWORD_OFFSET, r_tmp.GetReg()); 592 DCHECK_EQ(r_src.GetLowReg(), r_src.GetHighReg() - 1); 627 store = res = NewLIR3(opcode, r_src.GetLowReg(), displacement + LOWORD_OFFSET, r_base.GetReg()); 636 store = NewLIR3(opcode, r_src.GetLowReg(), LOWORD_OFFSET, r_scratch.GetReg());
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/art/compiler/dex/quick/arm/ |
int_arm.cc | 445 NewLIR3(kThumb2Fmdrr, r_dest.GetReg(), r_src.GetLowReg(), r_src.GetHighReg()); 449 NewLIR3(kThumb2Fmrrd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_src.GetReg()); 452 if (r_src.GetHighReg() == r_dest.GetLowReg()) { 453 DCHECK_NE(r_src.GetLowReg(), r_dest.GetHighReg()); 751 if (rl_address.reg.GetReg() != rl_result.reg.GetLowReg()) { 912 NewLIR4(kThumb2Strexd /* eq */, r_tmp.GetReg(), rl_new_value.reg.GetLowReg(), rl_new_value.reg.GetHighReg(), r_ptr.GetReg()); [all...] |
utility_arm.cc | 681 r_dest.GetLowReg(), r_dest.GetHighReg(), rs_r15pc.GetReg(), 0, 0, data_target); 840 lir = NewLIR4(opcode, r_src_dest.GetLowReg(), r_src_dest.GetHighReg(), r_ptr.GetReg(), 981 LIR* lir = NewLIR3(kThumb2Ldrexd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_ptr.GetReg()); [all...] |
/art/compiler/dex/quick/x86/ |
utility_x86.cc | 254 int dest = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); 305 int src = r_src.IsPair() ? r_src.GetLowReg() : r_src.GetReg(); 563 int32_t low_reg_val = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); 698 load2 = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET); 700 load = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET); 726 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, 733 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, 747 load = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale, 837 store = NewLIR3(opcode, r_base.GetReg(), displacement + LOWORD_OFFSET, r_src.GetLowReg()); 856 displacement + LOWORD_OFFSET, r_src.GetLowReg()); [all...] |
int_x86.cc | 162 NewLIR2(kX86MovdxrRR, r_dest.GetReg(), r_src.GetLowReg()); 175 NewLIR2(kX86MovdrxRR, r_dest.GetLowReg(), r_src.GetReg()); 188 if (r_src.GetHighReg() == r_dest.GetLowReg() && 189 r_src.GetLowReg() == r_dest.GetHighReg()) { 196 } else if (r_src.GetHighReg() == r_dest.GetLowReg()) { [all...] |
target_x86.cc | 498 DCHECK(res.reg.GetLowReg() == rs_rAX.GetReg()); 943 << ", low: " << static_cast<int>(loc.reg.GetLowReg()) [all...] |
/art/compiler/dex/ |
reg_storage.h | 227 int GetLowReg() const {
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/art/compiler/dex/quick/ |
gen_invoke.cc | [all...] |
mir_to_lir-inl.h | 259 RegisterInfo* res = reg.IsPair() ? reginfo_map_.Get(reg.GetLowReg()) :
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gen_common.cc | [all...] |
ralloc_util.cc | 566 int free_low = rl_free.reg.GetLowReg(); 568 int keep_low = rl_keep.reg.GetLowReg(); [all...] |