| /external/valgrind/main/VEX/priv/ |
| guest_arm_toIR.c | 156 /* MOD. Initially IRTemp_INVALID. If the r15 branch to be generated
159 IRTemp_INVALID. */
336 if (guardT == IRTemp_INVALID) {
349 if (guardT == IRTemp_INVALID) {
578 register: if guardT == IRTemp_INVALID then the write is
594 if (guardT == IRTemp_INVALID) {
607 vassert(r15guard == IRTemp_INVALID);
618 if guardT == IRTemp_INVALID then the write is unconditional. */
627 if (guardT == IRTemp_INVALID) {
714 register: if guardT == IRTemp_INVALID then the write i
[all...] |
| guest_amd64_toIR.c | [all...] |
| guest_x86_toIR.c | 762 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr,
[all...] |
| guest_ppc_toIR.c | 617 vassert(vEvn && *vEvn == IRTemp_INVALID);
618 vassert(vOdd && *vOdd == IRTemp_INVALID);
635 vassert(vEvn && *vEvn == IRTemp_INVALID);
636 vassert(vOdd && *vOdd == IRTemp_INVALID);
653 vassert(vEvn && *vEvn == IRTemp_INVALID);
654 vassert(vOdd && *vOdd == IRTemp_INVALID);
671 vassert(vEvn && *vEvn == IRTemp_INVALID);
672 vassert(vOdd && *vOdd == IRTemp_INVALID);
692 vassert(t0 && *t0 == IRTemp_INVALID);
693 vassert(t1 && *t1 == IRTemp_INVALID);
[all...] |
| ir_defs.c | 113 if (tmp == IRTemp_INVALID)
114 vex_printf("IRTemp_INVALID");
[all...] |
| guest_arm64_toIR.c | 320 //ZZ if (guardT == IRTemp_INVALID) {
333 //ZZ if (guardT == IRTemp_INVALID) {
[all...] |
| host_x86_isel.c | [all...] |
| host_arm64_isel.c | [all...] |
| host_s390_isel.c | [all...] |
| host_amd64_isel.c | [all...] |
| ir_opt.c | [all...] |
| host_mips_isel.c | [all...] |
| guest_s390_toIR.c | [all...] |
| host_ppc_isel.c | [all...] |
| host_arm_isel.c | [all...] |
| /external/valgrind/main/exp-sgcheck/ |
| h_main.c | 485 IRTemp_INVALID if code to compute the shadow has not yet been
489 IRTemp_INVALID, since it is illogical for a shadow tmp itself to be
566 IRTemp_INVALID and we are hoping to read that shadow tmp, it means
581 ent.shadow = IRTemp_INVALID;
651 ent.shadow = IRTemp_INVALID;
|
| /external/valgrind/main/coregrind/ |
| m_translate.c | 127 // - Unused slots have a .temp value of 'IRTemp_INVALID'.
130 // non-IRTemp_INVALID values. This is rare, and the overwriting of a
132 // - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID value.
153 SP_aliases[i].temp = IRTemp_INVALID;
161 vg_assert(temp != IRTemp_INVALID);
171 vg_assert(IRTemp_INVALID != temp);
193 if (SP_aliases[i].temp == IRTemp_INVALID) {
[all...] |
| /external/valgrind/main/memcheck/ |
| mc_translate.c | 150 and origin (shadowB) values, or these may be IRTemp_INVALID if code
154 and so .shadowV and .shadowB must be IRTemp_INVALID, since it is
234 IRTemp_INVALID and we are hoping to read that shadow tmp, it means
249 ent.shadowV = IRTemp_INVALID;
250 ent.shadowB = IRTemp_INVALID;
266 if (ent->shadowV == IRTemp_INVALID) {
273 tl_assert(ent->shadowV == IRTemp_INVALID);
[all...] |
| /external/valgrind/main/VEX/ |
| test_main.c | 544 Initially all entries are IRTemp_INVALID. Entries are added
592 if (mce->tmpMap[orig] == IRTemp_INVALID) {
[all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_ir.h | 399 #define IRTemp_INVALID ((IRTemp)0xFFFFFFFF)
[all...] |
| /external/valgrind/main/helgrind/ |
| hg_main.c | [all...] |
