/external/valgrind/main/none/tests/mips64/ |
logical_instructions.c | 7 OR, ORI, XOR, XORI 68 case ORI: 70 TEST2("ori $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1); 71 TEST2("ori $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3); 72 TEST2("ori $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1); 73 TEST2("ori $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1); 74 TEST2("ori $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1); 75 TEST2("ori $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3); 76 TEST2("ori $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1); 77 TEST2("ori $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1) [all...] |
/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 299 case ORI:
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assembler-mips.cc | 181 // specially coded on MIPS means that it is a lui/ori instruction, and that is 550 return opcode == ORI; 1249 void Assembler::ori(Register rt, Register rs, int32_t j) { function in class:v8::Assembler [all...] |
assembler-mips-inl.h | 149 // For an instruction like LUI/ORI where the target bits are mixed into the 353 (instr1 & kOpcodeMask) == ORI &&
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constants-mips.h | 279 ORI = ((1 << 3) + 5) << kOpcodeShift,
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simulator-mips.cc | [all...] |
macro-assembler-mips.cc | 755 ori(rd, rs, rt.imm32_); 909 ori(rd, zero_reg, j.imm32_); 914 ori(rd, rd, (j.imm32_ & kImm16Mask)); 923 ori(rd, rd, (j.imm32_ & kImm16Mask)); [all...] |
/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.cpp | 387 mMips->ORI(tmpReg, tmpReg, (amode.value & 0x0000ffff)); 471 mMips->ORI(Rd, Rn, src); 478 mMips->ORI(R_at, 0, src); 488 mMips->ORI(R_at, 0, src); 501 mMips->ORI(Rd, Rd, (amode.value & 0x0000ffff)); 504 mMips->ORI(Rd, 0, amode.value); 533 mMips->ORI(Rd, Rd, (amode.value & 0x0000ffff)); 536 mMips->ORI(Rd, 0, amode.value); 579 mMips->ORI(R_cmp2, R_zero, src); [all...] |
MIPSAssembler.h | 307 void ORI(int Rt, int Rs, uint16_t imm);
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/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 254 // transform this into the appropriate ORI instruction. 303 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) 307 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) 329 BuildMI(*MI->getParent(), MI, dl, TII.get(PPC::ORI), DstReg) 566 : PPC::ORI ); 863 : PPC::ORI ); [all...] |
PPCFastISel.cpp | [all...] |
PPCRegisterInfo.cpp | 806 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg) [all...] |
PPCISelLowering.cpp | [all...] |
/external/chromium_org/third_party/icu/source/common/ |
ucnvisci.c | 94 ORI = 0x47, 147 { ORIYA, ORI_MASK, ORI }, 270 * | DEV | PNJ | GJR | ORI | BNG | TLG | MLM | TML | [all...] |
/external/icu/icu4c/source/common/ |
ucnvisci.c | 92 ORI = 0x47, 145 { ORIYA, ORI_MASK, ORI }, 273 * | DEV | PNJ | GJR | ORI | BNG | TLG | MLM | TML | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |