/external/qemu/target-i386/ |
seg_helper.c | 142 if (seg_reg == R_CS) { 173 if (seg_reg == R_SS || seg_reg == R_CS) 369 cpu_x86_set_cpl(env, new_segs[R_CS] & 3); 401 tss_load_seg(env, R_CS, new_segs[R_CS]); 410 if (new_eip > env->segs[R_CS].limit) { 636 PUSHL(ssp, esp, sp_mask, env->segs[R_CS].selector); 653 PUSHW(ssp, esp, sp_mask, env->segs[R_CS].selector); 674 cpu_x86_load_seg_cache(env, R_CS, selector, 810 PUSHQ(esp, env->segs[R_CS].selector) [all...] |
hax-all.c | 729 get_seg(&env->segs[R_CS], &sregs->_cs); 748 set_v8086_seg(&sregs->_cs, &env->segs[R_CS]); 755 set_seg(&sregs->_cs, &env->segs[R_CS]); 794 hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK; 806 if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) { 809 hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
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kvm.c | 398 set_v8086_seg(&sregs.cs, &env->segs[R_CS]); 405 set_seg(&sregs.cs, &env->segs[R_CS]); 513 get_seg(&env->segs[R_CS], &sregs.cs); 546 hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK; 558 if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) { 561 hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
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cpu.h | 73 #define R_CS 1 890 if (seg_reg == R_CS) { 900 new_hflags = (env->segs[R_CS].flags & DESC_B_MASK) [all...] |
svm_helper.c | 146 &env->segs[R_CS]); 203 env, R_CS); 505 &env->segs[R_CS]); 567 env, R_CS);
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smm_helper.c | 161 cpu_x86_load_seg_cache(env, R_CS, (env->smbase >> 4) & 0xffff, env->smbase,
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helper.c | 499 cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, [all...] |
translate.c | [all...] |
/external/qemu/ |
gdbstub.c | 541 case 2: GET_REG32(env->segs[R_CS].selector); 600 case 2: LOAD_SEG(10, R_CS); return 4; [all...] |
translate-all.c | [all...] |
/external/qemu/hw/intc/ |
apic.c | 505 cpu_x86_load_seg_cache(env, R_CS, s->sipi_vector << 8, s->sipi_vector << 12,
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/external/valgrind/main/VEX/priv/ |
guest_x86_toIR.c | 305 #define R_CS 1 488 case R_CS: return OFFB_CS; [all...] |
guest_amd64_toIR.c | 466 #define R_CS 1 [all...] |