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    Searched refs:SET_SE_CNTL (Results 1 - 14 of 14) sorted by null

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
radeon_tcl.c	265 se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL]; 273 if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) { 275 rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl; 471 se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL]; 474 if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) { 476 rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
radeon_state.c	403 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 426 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 428 rmesa->hw.set.cmd[SET_SE_CNTL] = s; 443 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_FFACE_CULL_DIR_MASK; 451 rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; 472 rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_WIDELINE_ENABLE; 474 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_WIDELINE_ENABLE; 1082 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 1106 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 1108 rmesa->hw.set.cmd[SET_SE_CNTL] = s     [all...]
radeon_context.h	106 #define SET_SE_CNTL 1
radeon_state_init.c	726 rmesa->hw.set.cmd[SET_SE_CNTL] = (RADEON_FFACE_CULL_CCW |     [all...]
/external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_tcl.c	265 se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL]; 273 if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) { 275 rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl; 471 se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL]; 474 if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) { 476 rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
radeon_state.c	403 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 426 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 428 rmesa->hw.set.cmd[SET_SE_CNTL] = s; 443 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_FFACE_CULL_DIR_MASK; 451 rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; 472 rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_WIDELINE_ENABLE; 474 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_WIDELINE_ENABLE; 1082 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 1106 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 1108 rmesa->hw.set.cmd[SET_SE_CNTL] = s     [all...]
radeon_context.h	106 #define SET_SE_CNTL 1
radeon_state_init.c	726 rmesa->hw.set.cmd[SET_SE_CNTL] = (RADEON_FFACE_CULL_CCW |     [all...]
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
r200_state.c	495 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 518 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 520 rmesa->hw.set.cmd[SET_SE_CNTL] = s; 535 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~R200_FFACE_CULL_DIR_MASK; 543 rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; 656 rmesa->hw.set.cmd[SET_SE_CNTL] |= R200_WIDELINE_ENABLE; 658 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~R200_WIDELINE_ENABLE;     [all...]
r200_context.h	120 #define SET_SE_CNTL 1
r200_state_init.c	[all...]
/external/mesa3d/src/mesa/drivers/dri/r200/
r200_state.c	495 GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 518 if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 520 rmesa->hw.set.cmd[SET_SE_CNTL] = s; 535 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~R200_FFACE_CULL_DIR_MASK; 543 rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; 656 rmesa->hw.set.cmd[SET_SE_CNTL] |= R200_WIDELINE_ENABLE; 658 rmesa->hw.set.cmd[SET_SE_CNTL] &= ~R200_WIDELINE_ENABLE;     [all...]
r200_context.h	120 #define SET_SE_CNTL 1
r200_state_init.c	[all...]

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