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Searched refs:_OFFSET (Results 1 - 6 of 6) sorted by null

/hardware/intel/img/psb_video/src/hwdefs/
msvdx_offsets.h	`55 #define RENDEC_REGISTER_OFFSET(__group__, __reg__ ) ( (__group__##_##__reg__##_OFFSET) + ( REG_##__group__##_OFFSET ) ) 62 #define REGISTER_OFFSET(__group__, __reg__ ) ( (__group__##_##__reg__##_OFFSET) ) 68 // #define REGISTER_OFFSET(__group__, __reg__ ) ( (__group__##_##__reg__##_OFFSET) + ( REG_##__group__##_OFFSET ) ) 69 #define REGISTER_OFFSET(__group__, __reg__ ) ( (__group__##_##__reg__##_OFFSET) + ( REG_##__group__##_OFFSET ) + 0x04800000 )`
mem_io.h	284 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) & field##_MASK) >> field##_SHIFT)) ) 290 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) & field##_MASK) >> field##_SHIFT)) 295 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) >> field##_SHIFT) & field##_LSBMASK) ) 313 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET + (field##_STRIDE * ui32TabIndex)))) & field##_MASK) >> field##_SHIFT)) ) \ 318 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET + (field##_STRIDE * ui32TabIndex)))) & field##_MASK) >> field##_SHIFT)) \ 333 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) & (field##_MASK >> (ui32RepIndex * field##_SIZE))) >> (field##_SHIFT - (ui32RepIndex * field##_SIZE)))) ) \ 338 ( (IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) & (field##_MASK >> (ui32RepIndex * field##_SIZE))) >> (field##_SHIFT - (ui32RepIndex * field##_SIZE))) ) \ 351 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET + (field##_STRIDE * ui32TabIndex)))) & (field##_MASK >> (ui32RepIndex * field##_SIZE))) >> (field##_SHIFT - (ui32RepIndex * field##_SIZE)))) ) \ 356 ((IMG_UINT32)(((((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET + (field##_STRIDE * ui32TabIndex)))) & (field##_MASK >> (ui32RepIndex * field##_SIZE))) >> (field##_SHIFT - (ui32RepIndex * field##_SIZE)))) \ 368 (((field##_TYPE )(((IMG_UINTPTR_T)vpMem) + field##_OFFSET))) = [all...]
reg_io2.h	`306 group##_ReadRegister(ui32DevId, group##_##reg##_OFFSET) 316 group##_ReadRegister(ui32DevId, (group##_##reg##_OFFSET+(ui32TabIndexgroup##_##reg##_STRIDE))) ) 367 group##_WriteRegister(ui32DevId, (group##_##reg##_OFFSET), (ui32RegValue)) 376 group##_WriteRegister(ui32DevId, (group##_##reg##_OFFSET+(ui32TabIndexgroup##_##reg##_STRIDE)), ui32RegValue) 386 group##_WriteRegister(ui32DevId, (group##_##reg##_OFFSET+(ui32Offset*4)), ui32RegValue)`
/external/oprofile/module/ia64/
IA64entry.h	`21 #define PT(f) (IA64_PT_REGS_##f##_OFFSET) 22 #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)`
/hardware/intel/img/psb_video/src/mrst/
psb_deblock.c	`82 cmdbuf->regio_idx++ = ( (group##_##reg##_OFFSET + group##_##BASE + indexgroup##_##reg##_STRIDE) \| MSVDX_DEBLOCK_REG_SET); \`
/hardware/intel/img/psb_video/src/
tng_VP8.c	`57 #define RENDEC_REGISTER_OFFSET(__group__, __reg__ ) ( (__group__##_##__reg__##_OFFSET) + ( REG_##__group__##_OFFSET ) ) [all...]`

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