| /external/libcxx/test/algorithms/alg.modifying.operations/alg.random.shuffle/ |
| random_shuffle_rand.pass.cpp | 32 int ia1[] = {4, 1, 2, 3}; local
36 assert(std::equal(ia, ia+sa, ia1));
|
| random_shuffle.pass.cpp | 23 int ia1[] = {1, 4, 3, 2}; local
27 assert(std::equal(ia, ia+sa, ia1));
|
| random_shuffle_urng.pass.cpp | 23 int ia1[] = {2, 7, 1, 4, 3, 6, 5, 10, 9, 8}; local
28 assert(std::equal(ia, ia+sa, ia1));
|
| /ndk/sources/cxx-stl/llvm-libc++/libcxx/test/algorithms/alg.modifying.operations/alg.random.shuffle/ |
| random_shuffle_rand.pass.cpp | 32 int ia1[] = {4, 1, 2, 3}; local
36 assert(std::equal(ia, ia+sa, ia1));
|
| random_shuffle.pass.cpp | 23 int ia1[] = {1, 4, 3, 2}; local
27 assert(std::equal(ia, ia+sa, ia1));
|
| random_shuffle_urng.pass.cpp | 23 int ia1[] = {2, 7, 1, 4, 3, 6, 5, 10, 9, 8}; local
28 assert(std::equal(ia, ia+sa, ia1));
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_disasm.c | 550 if (inst->bits1.ia1.dest_subreg_nr)
551 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
552 reg_type_size[inst->bits1.ia1.dest_reg_type]);
553 if (inst->bits1.ia1.dest_indirect_offset)
554 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
556 err |= control (file, "horiz stride", horiz_stride, inst->bits1.ia1.dest_horiz_stride, NULL);
558 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
926 inst->bits1.ia1.src0_reg_type,
927 inst->bits1.ia1.src0_reg_file,
928 inst->bits2.ia1.src0_indirect_offset
[all...] |
| brw_optimize.c | 124 if (inst->bits1.ia1.dest_reg_file == BRW_GENERAL_REGISTER_FILE)
308 if (inst->bits1.ia1.src0_reg_file == BRW_GENERAL_REGISTER_FILE)
343 if (inst->bits1.ia1.src1_reg_file == BRW_GENERAL_REGISTER_FILE)
|
| brw_structs.h | 992 } ia1; member in union:brw_instruction::__anon18041
1081 } ia1; member in union:brw_instruction::__anon18048
1185 } ia1; member in union:brw_instruction::__anon18055
[all...] |
| brw_eu_emit.c | 134 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
139 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
142 insn->bits1.ia1.dest_horiz_stride = dest.hstride;
273 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
276 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_disasm.c | 550 if (inst->bits1.ia1.dest_subreg_nr)
551 format (file, ".%d", inst->bits1.ia1.dest_subreg_nr /
552 reg_type_size[inst->bits1.ia1.dest_reg_type]);
553 if (inst->bits1.ia1.dest_indirect_offset)
554 format (file, " %d", inst->bits1.ia1.dest_indirect_offset);
556 err |= control (file, "horiz stride", horiz_stride, inst->bits1.ia1.dest_horiz_stride, NULL);
558 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL);
926 inst->bits1.ia1.src0_reg_type,
927 inst->bits1.ia1.src0_reg_file,
928 inst->bits2.ia1.src0_indirect_offset
[all...] |
| brw_optimize.c | 124 if (inst->bits1.ia1.dest_reg_file == BRW_GENERAL_REGISTER_FILE)
308 if (inst->bits1.ia1.src0_reg_file == BRW_GENERAL_REGISTER_FILE)
343 if (inst->bits1.ia1.src1_reg_file == BRW_GENERAL_REGISTER_FILE)
|
| brw_structs.h | 992 } ia1; member in union:brw_instruction::__anon31600
1081 } ia1; member in union:brw_instruction::__anon31607
1185 } ia1; member in union:brw_instruction::__anon31614
[all...] |
| brw_eu_emit.c | 134 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
139 insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
142 insn->bits1.ia1.dest_horiz_stride = dest.hstride;
273 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
276 insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset;
[all...] |
| /libcore/harmony-tests/src/test/java/org/apache/harmony/tests/java/net/ |
| InetAddressTest.java | 56 InetAddress ia1 = InetAddress.getByName("localhost"); local
58 assertEquals(ia2, ia1);
|
