/external/lldb/source/Plugins/Instruction/ARM/ |
EmulateInstructionARM.h | 548 EmulateShiftImm (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type); 552 EmulateShiftReg (const uint32_t opcode, const ARMEncoding encoding, ARM_ShifterType shift_type);
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EmulateInstructionARM.cpp | [all...] |
/external/vixl/src/a64/ |
simulator-a64.h | 509 Shift shift_type, 513 Shift shift_type,
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simulator-a64.cc | 297 Shift shift_type, 303 switch (shift_type) { 666 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local 668 int64_t op2 = ShiftOperand(reg_size, reg(reg_size, instr->Rm()), shift_type, [all...] |
/art/compiler/dex/quick/arm64/ |
utility_arm64.cc | [all...] |
/art/disassembler/ |
disassembler_arm.cc | 646 uint32_t shift_type = ((instr >> 4) & 0x3); local 736 bool noShift = (imm5 == 0 && shift_type != 0x3); 739 switch (shift_type) { 751 if (shift_type != 0x3 /* rrx */) { 752 args << StringPrintf(" #%d", (0 != imm5 || 0 == shift_type) ? imm5 : 32); [all...] |
/external/chromium_org/v8/src/arm64/ |
simulator-arm64.cc | 880 T Simulator::ShiftOperand(T value, Shift shift_type, unsigned amount) { 887 switch (shift_type) { 1294 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local 1340 Shift shift_type = static_cast<Shift>(instr->ShiftDP()); local [all...] |
simulator-arm64.h | 616 Shift shift_type,
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/external/valgrind/main/VEX/priv/ |
guest_arm_toIR.c | 9064 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local 9124 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local 9182 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local [all...] |
/external/chromium_org/v8/src/arm/ |
simulator-arm.cc | 2606 int32_t shift_type = instr->Bit(6); local [all...] |