| /external/qemu/include/exec/ |
| gen-icount.h | 20 tcg_gen_ld_i32(count, cpu_env, offsetof(CPUArchState, icount_decr.u32));
|
| /external/qemu/tcg/ |
| tcg-op.h | 455 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) function
845 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
852 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
862 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset);
863 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4);
865 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset);
866 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
[all...] |
| /external/qemu/target-mips/ |
| translate.c | 564 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUMIPSState, CP0_SRSCtl));
587 tcg_gen_ld_i32(t2, cpu_env, offsetof(CPUMIPSState, CP0_SRSCtl));
604 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
614 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUMIPSState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
[all...] |
| /external/qemu/target-arm/ |
| translate.c | 136 tcg_gen_ld_i32(tmp, cpu_env, offset);
1101 tcg_gen_ld_i32(tmp, cpu_env, neon_reg_offset(reg, pass));
1121 #define tcg_gen_ld_f32 tcg_gen_ld_i32
1165 tcg_gen_ld_i32(var, cpu_env, offsetof(CPUARMState, iwmmxt.cregs[reg]));
[all...] |
| /external/qemu/target-i386/ |
| translate.c | [all...] |
