/hardware/intel/img/libdrm/libdrm/nouveau/ |
nouveau_channel.h | 38 struct nouveau_grobj *vram; member in struct:nouveau_channel
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nouveau_channel.c | 57 &nvchan->base.vram) || 117 nouveau_grobj_free(&nvchan->base.vram);
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nouveau_pushbuf.h | 150 chan->vram->handle, chan->gart->handle);
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/nouveau/ |
nv04_context.c | 88 PUSH_DATA (push, fifo->vram); 89 PUSH_DATA (push, fifo->vram); 95 PUSH_DATA (push, fifo->vram); 103 PUSH_DATA (push, fifo->vram);
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nv04_surface.c | 234 PUSH_DATA (push, fifo->vram); 242 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 298 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 299 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 442 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
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nv20_context.c | 109 PUSH_DATA (push, fifo->vram); 112 PUSH_DATA (push, fifo->vram); 113 PUSH_DATA (push, fifo->vram); 115 PUSH_DATA (push, fifo->vram); 173 PUSH_DATA (push, fifo->vram); 175 PUSH_DATA (push, fifo->vram);
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nv10_context.c | 214 PUSH_DATA (push, fifo->vram); 218 PUSH_DATA (push, fifo->vram); 219 PUSH_DATA (push, fifo->vram); 250 PUSH_DATA (push, fifo->vram); 251 PUSH_DATA (push, fifo->vram);
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/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
nv04_context.c | 88 PUSH_DATA (push, fifo->vram); 89 PUSH_DATA (push, fifo->vram); 95 PUSH_DATA (push, fifo->vram); 103 PUSH_DATA (push, fifo->vram);
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nv04_surface.c | 234 PUSH_DATA (push, fifo->vram); 242 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 298 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 299 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 442 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart);
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nv20_context.c | 109 PUSH_DATA (push, fifo->vram); 112 PUSH_DATA (push, fifo->vram); 113 PUSH_DATA (push, fifo->vram); 115 PUSH_DATA (push, fifo->vram); 173 PUSH_DATA (push, fifo->vram); 175 PUSH_DATA (push, fifo->vram);
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nv10_context.c | 214 PUSH_DATA (push, fifo->vram); 218 PUSH_DATA (push, fifo->vram); 219 PUSH_DATA (push, fifo->vram); 250 PUSH_DATA (push, fifo->vram); 251 PUSH_DATA (push, fifo->vram);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/ |
nv30_screen.c | 462 PUSH_DATA (push, fifo->vram); /* TEXTURE0 */ 464 PUSH_DATA (push, fifo->vram); /* COLOR1 */ 466 PUSH_DATA (push, fifo->vram); /* COLOR0 */ 467 PUSH_DATA (push, fifo->vram); /* ZETA */ 468 PUSH_DATA (push, fifo->vram); /* VTXBUF0 */ 494 PUSH_DATA (push, fifo->vram); 495 PUSH_DATA (push, fifo->vram); /* COLOR3 */
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nv30_transfer.c | 439 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 450 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 460 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 512 PUSH_DATA (push, (src->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 513 PUSH_DATA (push, (dst->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 704 PUSH_DATA (push, (s_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 705 PUSH_DATA (push, (d_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
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/external/mesa3d/src/gallium/drivers/nv30/ |
nv30_screen.c | 462 PUSH_DATA (push, fifo->vram); /* TEXTURE0 */ 464 PUSH_DATA (push, fifo->vram); /* COLOR1 */ 466 PUSH_DATA (push, fifo->vram); /* COLOR0 */ 467 PUSH_DATA (push, fifo->vram); /* ZETA */ 468 PUSH_DATA (push, fifo->vram); /* VTXBUF0 */ 494 PUSH_DATA (push, fifo->vram); 495 PUSH_DATA (push, fifo->vram); /* COLOR3 */
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nv30_transfer.c | 439 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 450 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 460 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); 512 PUSH_DATA (push, (src->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 513 PUSH_DATA (push, (dst->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 704 PUSH_DATA (push, (s_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); 705 PUSH_DATA (push, (d_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
nv50_screen.c | 339 PUSH_DATA (push, fifo->vram); 340 PUSH_DATA (push, fifo->vram); 346 PUSH_DATA (push, fifo->vram); 347 PUSH_DATA (push, fifo->vram); 348 PUSH_DATA (push, fifo->vram); 368 PUSH_DATA(push, fifo->vram); 371 PUSH_DATA(push, fifo->vram); 613 * admit them to VRAM. 736 screen->max_tls_space /= 2; /* half of vram */ 748 debug_printf("TPs = %u, MPsInTP = %u, VRAM = %"PRIu64" MiB, tls_size = %"PRIu64" KiB\n" [all...] |
/external/mesa3d/src/gallium/drivers/nv50/ |
nv50_screen.c | 339 PUSH_DATA (push, fifo->vram); 340 PUSH_DATA (push, fifo->vram); 346 PUSH_DATA (push, fifo->vram); 347 PUSH_DATA (push, fifo->vram); 348 PUSH_DATA (push, fifo->vram); 368 PUSH_DATA(push, fifo->vram); 371 PUSH_DATA(push, fifo->vram); 613 * admit them to VRAM. 736 screen->max_tls_space /= 2; /* half of vram */ 748 debug_printf("TPs = %u, MPsInTP = %u, VRAM = %"PRIu64" MiB, tls_size = %"PRIu64" KiB\n" [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nouveau/ |
nouveau_screen.c | 123 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
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/external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/ |
radeon_winsys.h | 302 * Return TRUE if there is enough memory in VRAM and GTT for the relocs 312 * Return TRUE if there is enough memory in VRAM and GTT for the relocs 316 * \param vram VRAM memory size pending to be use 319 boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt);
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radeon_drm_cs.c | 53 used_vram/gart < vram/gart_size * 0.8 369 static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) 374 (cs->csc->used_vram + vram) < cs->ws->info.vram_size * 0.7;
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/external/mesa3d/src/gallium/drivers/nouveau/ |
nouveau_screen.c | 123 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
radeon_winsys.h | 302 * Return TRUE if there is enough memory in VRAM and GTT for the relocs 312 * Return TRUE if there is enough memory in VRAM and GTT for the relocs 316 * \param vram VRAM memory size pending to be use 319 boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt);
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radeon_drm_cs.c | 53 used_vram/gart < vram/gart_size * 0.8 369 static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt) 374 (cs->csc->used_vram + vram) < cs->ws->info.vram_size * 0.7;
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
r600_hw_context.c | 638 if (!ctx->ws->cs_memory_below_limit(ctx->cs, ctx->vram, ctx->gtt)) { 640 ctx->vram = 0; 646 ctx->vram = 0; 967 ctx->vram = 0; [all...] |
/external/mesa3d/src/gallium/drivers/r600/ |
r600_hw_context.c | 638 if (!ctx->ws->cs_memory_below_limit(ctx->cs, ctx->vram, ctx->gtt)) { 640 ctx->vram = 0; 646 ctx->vram = 0; 967 ctx->vram = 0; [all...] |