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  /external/chromium_org/third_party/freetype/include/freetype/config/
ftconfig.h 419 "shll $16, %%edx\n"
  /external/neven/Embedded/common/src/b_BitFeatureEm/
LocalScanner.c 703 uint32 shlL = 32 - offL;
704 for( iL = 0; iL < sizeL; iL++ ) dstL[ iL ] = ( dstL[ iL ] >> 1 ) | ( srcL[ iL ] << shlL );
755 uint32 shlL = 32 - offL;
756 for( iL = 0; iL < sizeL; iL++ ) dstL[ iL ] = ( src0L[ iL ] >> offL ) | ( src1L[ iL ] << shlL );
  /external/pdfium/core/include/thirdparties/freetype/freetype/config/
ftconfig.h 420 "shll $16, %%edx\n"
  /external/pdfium/core/src/fxge/fx_freetype/fxft2.5.01/include/freetype/config/
ftconfig.h 420 "shll $16, %%edx\n"
  /external/zlib/src/contrib/amd64/
amd64-match.S 179 shll $16, %chainlenwmask
  /external/zlib/src/contrib/asm686/
match.S 135 shll $16, %ebx
  /external/llvm/test/MC/X86/
x86-16.s 45 // CHECK: shll %eax # encoding: [0x66,0xd1,0xe0]
47 // CHECK: shll %eax # encoding: [0x66,0xd1,0xe0]
x86-32.s 94 // CHECK: shll %eax # encoding: [0xd1,0xe0]
96 // CHECK: shll %eax # encoding: [0xd1,0xe0]
x86-64.s 96 // CHECK: shll $2, %eax
97 shll $2, %eax
99 // CHECK: shll $2, %eax
  /external/clang/test/CodeGen/
aarch64-neon-misc.c     [all...]
  /external/llvm/test/MC/AArch64/
neon-simd-misc.s 400 shll v2.8h, v4.8b, #8
401 shll v6.4s, v8.4h, #16
402 shll v6.2d, v8.2s, #32
407 // CHECK: shll v2.8h, v4.8b, #8 // encoding: [0x82,0x38,0x21,0x2e]
408 // CHECK: shll v6.4s, v8.4h, #16 // encoding: [0x06,0x39,0x61,0x2e]
409 // CHECK: shll v6.2d, v8.2s, #32 // encoding: [0x06,0x39,0xa1,0x2e]
  /external/valgrind/main/VEX/orig_x86/
exit42.orig 262 0x3A965E4B: shll $0x4, %eax
297 0x3A965E4B: shll $0x4, %eax
430 0x3A972EA8: shll %cl, %eax
471 0x3A972EA8: shll %cl, %eax
530 0x3A972EA8: shll %cl, %eax
611 0x3A972F46: shll $0x8, %edi
    [all...]
  /external/valgrind/main/none/tests/x86/
insn_basic.def     [all...]
  /art/compiler/utils/x86/
assembler_x86.cc 1048 void X86Assembler::shll(Register reg, const Immediate& imm) { function in class:art::x86::X86Assembler
1053 void X86Assembler::shll(Register operand, Register shifter) { function in class:art::x86::X86Assembler
    [all...]
  /external/llvm/lib/Target/Mips/
MipsDSPInstrInfo.td 641 class SHLL_QB_DESC : SHLL_QB_R2_DESC_BASE<"shll.qb", null_frag, immZExt3,
655 class SHLL_PH_DESC : SHLL_QB_R2_DESC_BASE<"shll.ph", null_frag, immZExt4,
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/
vpaes-x86_64.S 632 shll $4,%eax
aesni-x86-mac.S 1305 shll $4,%ebx
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/md5/asm/
md5-586-mac.S 13 shll $6,%ecx
md5-586.S 14 shll $6,%ecx
  /external/openssl/crypto/aes/asm/
vpaes-x86_64.S 632 shll $4,%eax
  /external/openssl/crypto/md5/asm/
md5-586.S 14 shll $6,%ecx
  /external/chromium_org/v8/src/x64/
lithium-codegen-x64.cc     [all...]
  /external/valgrind/main/none/tests/amd64/
insn_basic.def     [all...]
  /art/compiler/utils/x86_64/
assembler_x86_64.cc 1243 void X86_64Assembler::shll(CpuRegister reg, const Immediate& imm) { function in class:art::x86_64::X86_64Assembler
1248 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { function in class:art::x86_64::X86_64Assembler
    [all...]
  /external/chromium_org/third_party/libyuv/source/
scale_mips.cc 394 "shll.ph $t4, $t2, 1 \n"
    [all...]

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