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  /external/llvm/test/CodeGen/AArch64/
arm64-xaluo.ll 105 ; CHECK: smull x8, w0, w1
252 ; CHECK: smull x8, w0, w1
442 ; CHECK: smull x8, w0, w1
  /external/libhevc/common/arm64/
ihevc_intra_pred_filters_chroma_mode_11_to_17.s 251 smull v22.8h, v30.8b, v31.8b //(col+1)*intra_pred_angle [0:7](col)
417 smull v12.8h, v30.8b, v31.8b //(col+1)*intra_pred_angle [0:7](col)
528 smull v14.8h, v30.8b, v31.8b //(col+1)*intra_pred_angle [0:7](col)
  /external/chromium_org/third_party/freetype2/include/
ftconfig.h 303 "smull %1, %2, %4, %3\n\t" /* (lo=%1,hi=%2) = a*b */
  /external/chromium_org/third_party/opus/src/silk/
SigProc_FIX.h 191 /* Uses SMULL(), available on armv4 */
    [all...]
  /external/libopus/silk/
SigProc_FIX.h 191 /* Uses SMULL(), available on armv4 */
    [all...]
  /external/valgrind/main/none/tests/arm/
v6intARM.c 553 printf("SMULL\n");
554 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 0, 0, r0, r1, r2, r3, 0);
555 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 0, 1, r0, r1, r2, r3, 0);
556 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 1, 0, r0, r1, r2, r3, 0);
557 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 1, 1, r0, r1, r2, r3, 0);
558 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 0xffff, 0xffff, r0, r1, r2, r3, 0);
559 TESTINST4_2OUT("smull r0, r1, r2, r3", 0, 0, 0xffffffff, 0xffffffff, r0, r1, r2, r3, 0);
    [all...]
v6intARM.stdout.exp     [all...]
  /external/vixl/doc/
supported-instructions.md 803 ### smull ###
807 void smull(const Register& rd, const Register& rn, const Register& rm)
  /system/core/libpixelflinger/codeflinger/
ARMAssembler.cpp 255 void ARMAssembler::SMULL(int cc, int s,
258 "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
ARMAssemblerInterface.h 135 virtual void SMULL(int cc, int s,
Arm64Assembler.h 109 virtual void SMULL(int cc, int s,
MIPSAssembler.cpp 665 void ArmToMipsAssembler::SMULL(int cc, int s,
668 "SMULL(r%u,r%u,r%u,r%u)", RdLo,RdHi,Rm,Rs);
677 LOG_ALWAYS_FATAL("Condition on SMULL must be on 64-bit result\n");
    [all...]
MIPSAssembler.h 101 virtual void SMULL(int cc, int s,
disassem.c 125 { 0x0fe000f0, 0x00c00090, "smull", "Sdnms" },
  /external/clang/test/CodeGen/
aarch64-neon-2velem.c 491 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3]
497 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1]
539 // CHECK: smull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
545 // CHECK: smull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
    [all...]
  /external/llvm/test/MC/AArch64/
arm64-advsimd.s     [all...]
neon-diagnostics.s     [all...]
  /external/freetype/src/base/
ftcalc.c 62 smull t2, t, b, a /* (lo=t2,hi=t) = a*b */
94 "smull %1, %2, %4, %3\n\t" /* (lo=%1,hi=%2) = a*b */
  /external/chromium_org/v8/src/arm64/
macro-assembler-arm64-inl.h 1109 void MacroAssembler::Smull(const Register& rd,
1114 smull(rd, rn, rm);
    [all...]
  /external/llvm/lib/Target/ARM/
README.txt 431 smull r1, r0, r1, r0
432 smull r3, r2, r3, r2
  /external/vixl/src/a64/
macro-assembler-a64.h 951 void Smull(const Register& rd, const Register& rn, const Register& rm) {
956 smull(rd, rn, rm);
    [all...]
  /external/chromium_org/v8/test/cctest/
test-disasm-arm64.cc 456 COMPARE(smull(x0, w0, w1), "smull x0, w0, w1");
457 COMPARE(smull(lr, w30, w0), "smull lr, w30, w0");
    [all...]
  /external/vixl/test/
test-disasm-a64.cc 418 COMPARE(smull(x0, w0, w1), "smull x0, w0, w1");
419 COMPARE(smull(x30, w30, w0), "smull x30, w30, w0");
    [all...]
  /frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/
fastquant.cpp 387 /*smull tmp, coeff, q_value, q_scale*/
  /external/valgrind/main/none/tests/arm64/
fp_and_simd.c     [all...]

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